[PATCH 0/2] ARM: dts: sun8i: r40: Add deinterlace node

[Jernej Skrabec]

These two patches add support for deinterlace core found on R40. It's
compatible to H3 one, so only DT node is needed.

Please take a look.

Best regards,
Jernej

Jernej Skrabec (2):
dt-bindings: media: Add Allwinner R40 deinterlace compatible
ARM: dts: sun8i: r40: Add deinterlace node

.../media/allwinner,sun8i-h3-deinterlace.yaml | 3 +++
arch/arm/boot/dts/sun8i-r40.dtsi | 19 +++++++++++++++++++
2 files changed, 22 insertions(+)

--
2.30.0

[Jernej Skrabec]

Allwinner R40 SoC also contains deinterlace core, compatible to H3.

Add compatible string for it.

Signed-off-by: Jernej Skrabec <jernej....@siol.net>
---
.../bindings/media/allwinner,sun8i-h3-deinterlace.yaml | 3 +++
1 file changed, 3 insertions(+)

diff --git a/Documentation/devicetree/bindings/media/allwinner,sun8i-h3-deinterlace.yaml b/Documentation/devicetree/bindings/media/allwinner,sun8i-h3-deinterlace.yaml
index 6a56214c6cfd..b80980b1908e 100644
--- a/Documentation/devicetree/bindings/media/allwinner,sun8i-h3-deinterlace.yaml
+++ b/Documentation/devicetree/bindings/media/allwinner,sun8i-h3-deinterlace.yaml
@@ -19,6 +19,9 @@ properties:
compatible:
oneOf:
- const: allwinner,sun8i-h3-deinterlace
+ - items:
+ - const: allwinner,sun8i-r40-deinterlace
+ - const: allwinner,sun8i-h3-deinterlace
- items:
- const: allwinner,sun50i-a64-deinterlace
- const: allwinner,sun8i-h3-deinterlace
--
2.30.0

[Jernej Skrabec]

R40 contains deinterlace core compatible to that in H3. One peculiarity
is that RAM gate is shared with CSI1. User manual states it's separate
but that's not true. Shared gate was verified with BSP Linux code check
and with runtime tests (CPU crashed if CSI1 gate was not ungated).

Signed-off-by: Jernej Skrabec <jernej....@siol.net>
---

arch/arm/boot/dts/sun8i-r40.dtsi | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi b/arch/arm/boot/dts/sun8i-r40.dtsi
index 7907569e7b5c..d5ad3b9efd12 100644
--- a/arch/arm/boot/dts/sun8i-r40.dtsi
+++ b/arch/arm/boot/dts/sun8i-r40.dtsi
@@ -190,6 +190,25 @@ mixer1_out_tcon_top: endpoint {
};
};

+ deinterlace: deinterlace@1400000 {
+ compatible = "allwinner,sun8i-r40-deinterlace",
+ "allwinner,sun8i-h3-deinterlace";
+ reg = <0x01400000 0x20000>;
+ clocks = <&ccu CLK_BUS_DEINTERLACE>,
+ <&ccu CLK_DEINTERLACE>,
+ /*
+ * NOTE: Contrary to what datasheet claims,
+ * DRAM deinterlace gate doesn't exist and
+ * it's shared with CSI1.
+ */
+ <&ccu CLK_DRAM_CSI1>;
+ clock-names = "bus", "mod", "ram";
+ resets = <&ccu RST_BUS_DEINTERLACE>;
+ interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
+ interconnects = <&mbus 9>;
+ interconnect-names = "dma-mem";
+ };
+
syscon: system-control@1c00000 {
compatible = "allwinner,sun8i-r40-system-control",
"allwinner,sun4i-a10-system-control";
--
2.30.0

[Maxime Ripard]

On Wed, Jan 06, 2021 at 07:18:59PM +0100, Jernej Skrabec wrote:
> These two patches add support for deinterlace core found on R40. It's
> compatible to H3 one, so only DT node is needed.
>
> Please take a look.

Applied, thanks

Maxime