[PATCH v2 0/6] ARM: sunxi: Clean up sun7i-a20-gmac-clk usage

[Priit Laes]

This serie implements syscon-based regmap access to dwmac-sunxi driver,
allowing to deprecate the allwinner,sun7i-a20-gmac-clk clock driver.

In order to register regmap, we firstly need to change existing clock
setups (sun7i-a20 and sun6i-a31) from CLK_OF_DECLARE to
CLK_OF_DECLARE_DRIVER to allow probing the same driver again via the
platform driver framework.

This patchset touches 3 areas:
- sun7i and sun6i CCUs now set up regmap to allow dwmac-sunxi driver
to access GMAC clock register.
- dwmac-sunxi can now handle syscon-based clock register to handle
its own clock.
- sun7i and sun6i devicetrees are converted to use the new syscon-based
access.

After this patchset:
- sun7i-a20 works fully without legacy sunxi clocks (CLK_SUNXI)
- only sun9i-a80 SoC remains as a single sun7i-a20-gmac-clk user.

Please note that sun6i-a31 changes are only build-tested, as I lack
the hardware to test this.

Changes since v2:
* Fix broken sun6i-a31 CCU patch.
* Rename series to "Clean up sun7i-a20-gmac-clk usage"

Changes since v1:
* Use CLK_OF_DECLARE_DRIVER to make it possible to probe again and set up
regmap using platform device probe.
* Clarify the meaning of "legacy" in dwmac-sunxi driver.
* Make sure we don't mess with the RX/TX delay settings when updating
clock registers.
* Update devicetree bindings
* Add sun6i-A31 support. (not tested due to lack of hardware)

Priit Laes (6):
clk: sunxi-ng: a20: Register regmap for sun7i CCU
clk: sunxi-ng: a31: Register regmap for sun6i CCU
net: stmmac: dwmac-sunxi: Implement syscon-based clock handling
dt-bindings: net: sun7i-gmac: Add syscon support
ARM: dts: sun7i: Use syscon-based implementation for gmac
ARM: dts: sun6i: Use syscon-based implementation for gmac

.../net/allwinner,sun7i-a20-gmac.yaml | 15 +-
arch/arm/boot/dts/sun6i-a31.dtsi | 35 +----
arch/arm/boot/dts/sun7i-a20.dtsi | 36 +----
drivers/clk/sunxi-ng/ccu-sun4i-a10.c | 62 ++++++++-
drivers/clk/sunxi-ng/ccu-sun6i-a31.c | 62 ++++++++-
.../net/ethernet/stmicro/stmmac/dwmac-sunxi.c | 130 ++++++++++++++++--
6 files changed, 261 insertions(+), 79 deletions(-)

--
2.26.2

[Priit Laes]

On sun7i, the gmac clock is handled by the dwmac-sunxi driver, but
its configuration register is located in the CCU register range,
requiring proper regmap setup.

In order to do that, we use CLK_OF_DECLARE_DRIVER to initialize
sun7i ccu, which clears the OF_POPULATED flag, allowing the
platform device to probe the same resource with proper device node.

Signed-off-by: Priit Laes <pl...@plaes.org>
---
drivers/clk/sunxi-ng/ccu-sun4i-a10.c | 62 +++++++++++++++++++++++++++-
1 file changed, 60 insertions(+), 2 deletions(-)

diff --git a/drivers/clk/sunxi-ng/ccu-sun4i-a10.c b/drivers/clk/sunxi-ng/ccu-sun4i-a10.c
index f32366d9336e..fa147b8ce705 100644
--- a/drivers/clk/sunxi-ng/ccu-sun4i-a10.c
+++ b/drivers/clk/sunxi-ng/ccu-sun4i-a10.c
@@ -8,6 +8,8 @@
#include <linux/clk-provider.h>
#include <linux/io.h>
#include <linux/of_address.h>
+#include <linux/platform_device.h>
+#include <linux/regmap.h>

#include "ccu_common.h"
#include "ccu_reset.h"
@@ -1478,5 +1480,61 @@ static void __init sun7i_a20_ccu_setup(struct device_node *node)
{
sun4i_ccu_init(node, &sun7i_a20_ccu_desc);
}
-CLK_OF_DECLARE(sun7i_a20_ccu, "allwinner,sun7i-a20-ccu",
- sun7i_a20_ccu_setup);
+CLK_OF_DECLARE_DRIVER(sun7i_a20_ccu, "allwinner,sun7i-a20-ccu",
+ sun7i_a20_ccu_setup);
+
+/*
+ * Regmap for the GMAC driver (dwmac-sunxi) to allow access to
+ * GMAC configuration register.
+ */
+#define SUN7I_A20_GMAC_CFG_REG 0x164
+static bool sun7i_a20_ccu_regmap_accessible_reg(struct device *dev,
+ unsigned int reg)
+{
+ if (reg == SUN7I_A20_GMAC_CFG_REG)
+ return true;
+ return false;
+}
+
+static struct regmap_config sun7i_a20_ccu_regmap_config = {
+ .reg_bits = 32,
+ .val_bits = 32,
+ .reg_stride = 4,
+ .max_register = 0x1f4, /* clk_out_b */
+
+ .readable_reg = sun7i_a20_ccu_regmap_accessible_reg,
+ .writeable_reg = sun7i_a20_ccu_regmap_accessible_reg,
+};
+
+static int sun7i_a20_ccu_probe_regmap(struct platform_device *pdev)
+{
+ void __iomem *reg;
+ struct resource *res;
+ struct regmap *regmap;
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ reg = devm_ioremap(&pdev->dev, res->start, resource_size(res));
+ if (IS_ERR(reg))
+ return PTR_ERR(reg);
+
+ regmap = devm_regmap_init_mmio(&pdev->dev, reg,
+ &sun7i_a20_ccu_regmap_config);
+ if (IS_ERR(regmap))
+ return PTR_ERR(regmap);
+
+ return 0;
+}
+
+static const struct of_device_id sun7i_a20_ccu_ids[] = {
+ { .compatible = "allwinner,sun7i-a20-ccu"},
+ { }
+};
+
+static struct platform_driver sun7i_a20_ccu_driver = {
+ .probe = sun7i_a20_ccu_probe_regmap,
+ .driver = {
+ .name = "sun7i-a20-ccu",
+ .of_match_table = sun7i_a20_ccu_ids,
+ },
+};
+builtin_platform_driver(sun7i_a20_ccu_driver);
--
2.26.2

[Priit Laes]

Convert the sun7i-gmac driver to use a regmap-based driver,
instead of relying on the custom clock implementation.

This allows to get rid of the last custom clock in the sun7i
device tree making the sun7i fully CCU-compatible.

Compatibility with existing devicetrees is retained.

Signed-off-by: Priit Laes <pl...@plaes.org>
---

.../net/ethernet/stmicro/stmmac/dwmac-sunxi.c | 130 ++++++++++++++++--
1 file changed, 122 insertions(+), 8 deletions(-)

diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-sunxi.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-sunxi.c
index 0e1ca2cba3c7..206398f7a2af 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-sunxi.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-sunxi.c
@@ -12,8 +12,11 @@
#include <linux/module.h>
#include <linux/phy.h>
#include <linux/platform_device.h>
+#include <linux/of_device.h>
#include <linux/of_net.h>
#include <linux/regulator/consumer.h>
+#include <linux/regmap.h>
+#include <linux/mfd/syscon.h>

#include "stmmac_platform.h"

@@ -22,11 +25,23 @@ struct sunxi_priv_data {
int clk_enabled;
struct clk *tx_clk;
struct regulator *regulator;
+ struct regmap_field *regmap_field;
+};
+
+/* EMAC clock register @ 0x164 in the CCU address range */
+static const struct reg_field ccu_reg_field = {
+ .reg = 0x164,
+ .lsb = 0,
+ .msb = 31,
};

#define SUN7I_GMAC_GMII_RGMII_RATE 125000000
#define SUN7I_GMAC_MII_RATE 25000000

+#define SUN7I_A20_CLK_MASK GENMASK(2, 0)
+#define SUN7I_A20_RGMII_CLK (BIT(2) | BIT(1))
+#define SUN7I_A20_MII_CLK 0
+
static int sun7i_gmac_init(struct platform_device *pdev, void *priv)
{
struct sunxi_priv_data *gmac = priv;
@@ -38,7 +53,20 @@ static int sun7i_gmac_init(struct platform_device *pdev, void *priv)
return ret;
}

- /* Set GMAC interface port mode
+ if (gmac->regmap_field) {
+ if (phy_interface_mode_is_rgmii(gmac->interface)) {
+ regmap_field_update_bits(gmac->regmap_field,
+ SUN7I_A20_CLK_MASK,
+ SUN7I_A20_RGMII_CLK);
+ return clk_prepare_enable(gmac->tx_clk);
+ }
+ regmap_field_update_bits(gmac->regmap_field,
+ SUN7I_A20_CLK_MASK,
+ SUN7I_A20_MII_CLK);
+ return clk_enable(gmac->tx_clk);
+ }
+
+ /* Legacy devicetree clock (allwinner,sun7i-a20-gmac-clk) support:
*
* The GMAC TX clock lines are configured by setting the clock
* rate, which then uses the auto-reparenting feature of the
@@ -62,9 +90,16 @@ static void sun7i_gmac_exit(struct platform_device *pdev, void *priv)
{
struct sunxi_priv_data *gmac = priv;

- if (gmac->clk_enabled) {
+ if (gmac->regmap_field) {
+ regmap_field_update_bits(gmac->regmap_field,
+ SUN7I_A20_CLK_MASK, 0);
clk_disable(gmac->tx_clk);
- gmac->clk_enabled = 0;
+ } else {
+ /* Handle legacy devicetree clock (sun7i-a20-gmac-clk) */
+ if (gmac->clk_enabled) {
+ clk_disable(gmac->tx_clk);
+ gmac->clk_enabled = 0;
+ }
}
clk_unprepare(gmac->tx_clk);

@@ -72,10 +107,55 @@ static void sun7i_gmac_exit(struct platform_device *pdev, void *priv)
regulator_disable(gmac->regulator);
}

+static struct regmap *sun7i_gmac_get_syscon_from_dev(struct device_node *node)
+{
+ struct device_node *syscon_node;
+ struct platform_device *syscon_pdev;
+ struct regmap *regmap = NULL;
+
+ syscon_node = of_parse_phandle(node, "syscon", 0);
+ if (!syscon_node)
+ return ERR_PTR(-ENODEV);
+
+ syscon_pdev = of_find_device_by_node(syscon_node);
+ if (!syscon_pdev) {
+ /* platform device might not be probed yet */
+ regmap = ERR_PTR(-EPROBE_DEFER);
+ goto out_put_node;
+ }
+
+ /* If no regmap is found then the other device driver is at fault */
+ regmap = dev_get_regmap(&syscon_pdev->dev, NULL);
+ if (!regmap)
+ regmap = ERR_PTR(-EINVAL);
+
+ platform_device_put(syscon_pdev);
+out_put_node:
+ of_node_put(syscon_node);
+ return regmap;
+}
+
static void sun7i_fix_speed(void *priv, unsigned int speed)
{
struct sunxi_priv_data *gmac = priv;

+ if (gmac->regmap_field) {
+ clk_disable(gmac->tx_clk);
+ clk_unprepare(gmac->tx_clk);
+ if (speed == 1000)
+ regmap_field_update_bits(gmac->regmap_field,
+ SUN7I_A20_CLK_MASK,
+ SUN7I_A20_RGMII_CLK);
+ else
+ regmap_field_update_bits(gmac->regmap_field,
+ SUN7I_A20_CLK_MASK,
+ SUN7I_A20_MII_CLK);
+ clk_prepare_enable(gmac->tx_clk);
+ return;
+ }
+
+ /* Handle legacy devicetree clock (sun7i-a20-gmac-clk) */
+
/* only GMII mode requires us to reconfigure the clock lines */
if (gmac->interface != PHY_INTERFACE_MODE_GMII)
return;
@@ -102,6 +182,8 @@ static int sun7i_gmac_probe(struct platform_device *pdev)
struct stmmac_resources stmmac_res;
struct sunxi_priv_data *gmac;
struct device *dev = &pdev->dev;
+ struct device_node *syscon_node;
+ struct regmap *regmap = NULL;
int ret;

ret = stmmac_get_platform_resources(pdev, &stmmac_res);
@@ -124,11 +206,43 @@ static int sun7i_gmac_probe(struct platform_device *pdev)
goto err_remove_config_dt;
}

- gmac->tx_clk = devm_clk_get(dev, "allwinner_gmac_tx");
- if (IS_ERR(gmac->tx_clk)) {
- dev_err(dev, "could not get tx clock\n");
- ret = PTR_ERR(gmac->tx_clk);
- goto err_remove_config_dt;
+ /* Attempt to fetch syscon node... */
+ syscon_node = of_parse_phandle(dev->of_node, "syscon", 0);
+ if (syscon_node) {
+ gmac->tx_clk = devm_clk_get(dev, "stmmaceth");
+ if (IS_ERR(gmac->tx_clk)) {
+ dev_err(dev, "Could not get TX clock\n");
+ ret = PTR_ERR(gmac->tx_clk);
+ goto err_remove_config_dt;
+ }
+
+ regmap = sun7i_gmac_get_syscon_from_dev(pdev->dev.of_node);
+ if (IS_ERR(regmap))
+ regmap = syscon_regmap_lookup_by_phandle(pdev->dev.of_node,
+ "syscon");
+ if (IS_ERR(regmap)) {
+ ret = PTR_ERR(regmap);
+ dev_err(&pdev->dev, "Unable to map syscon: %d\n", ret);
+ goto err_remove_config_dt;
+ }
+
+ gmac->regmap_field = devm_regmap_field_alloc(dev, regmap,
+ ccu_reg_field);
+
+ if (IS_ERR(gmac->regmap_field)) {
+ ret = PTR_ERR(gmac->regmap_field);
+ dev_err(dev, "Unable to map syscon register: %d\n", ret);
+ goto err_remove_config_dt;
+ }
+ /* ...or fall back to legacy clock setup */
+ } else {
+ gmac->tx_clk = devm_clk_get(dev, "allwinner_gmac_tx");
+ if (IS_ERR(gmac->tx_clk)) {
+ dev_err(dev, "could not get tx clock\n");
+ ret = PTR_ERR(gmac->tx_clk);
+ goto err_remove_config_dt;
+ }
+ dev_info(dev, "allwinner_gmac_tx support is deprecated!\n");
}

/* Optional regulator for PHY */
--
2.26.2

[Priit Laes]

Use syscon-based approach to access gmac clock configuration
register instead of relying on a custom clock driver.

As a bonus, we can now drop the custom clock implementation
and the dummy clocks.

Signed-off-by: Priit Laes <pl...@plaes.org>
---

arch/arm/boot/dts/sun6i-a31.dtsi | 35 +++-----------------------------
1 file changed, 3 insertions(+), 32 deletions(-)

diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi
index f3425a66fc0a..fcf8a242741f 100644
--- a/arch/arm/boot/dts/sun6i-a31.dtsi
+++ b/arch/arm/boot/dts/sun6i-a31.dtsi
@@ -228,36 +228,6 @@ osc32k: clk-32k {
clock-output-names = "ext_osc32k";
};

- /*
- * The following two are dummy clocks, placeholders
- * used in the gmac_tx clock. The gmac driver will
- * choose one parent depending on the PHY interface
- * mode, using clk_set_rate auto-reparenting.
- *
- * The actual TX clock rate is not controlled by the
- * gmac_tx clock.
- */
- mii_phy_tx_clk: clk-mii-phy-tx {
- #clock-cells = <0>;
- compatible = "fixed-clock";
- clock-frequency = <25000000>;
- clock-output-names = "mii_phy_tx";
- };
-
- gmac_int_tx_clk: clk-gmac-int-tx {
- #clock-cells = <0>;
- compatible = "fixed-clock";
- clock-frequency = <125000000>;
- clock-output-names = "gmac_int_tx";
- };
-
- gmac_tx_clk: clk@1c200d0 {
- #clock-cells = <0>;
- compatible = "allwinner,sun7i-a20-gmac-clk";
- reg = <0x01c200d0 0x4>;
- clocks = <&mii_phy_tx_clk>, <&gmac_int_tx_clk>;
- clock-output-names = "gmac_tx";
- };
};

de: display-engine {
@@ -943,11 +913,12 @@ i2c3: i2c@1c2b800 {

gmac: ethernet@1c30000 {
compatible = "allwinner,sun7i-a20-gmac";
+ syscon = <&ccu>;
reg = <0x01c30000 0x1054>;
interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "macirq";
- clocks = <&ccu CLK_AHB1_EMAC>, <&gmac_tx_clk>;
- clock-names = "stmmaceth", "allwinner_gmac_tx";
+ clocks = <&ccu CLK_AHB1_EMAC>;
+ clock-names = "stmmaceth";
resets = <&ccu RST_AHB1_EMAC>;
reset-names = "stmmaceth";
snps,pbl = <2>;
--
2.26.2

[Priit Laes]

On sun6i, the gmac clock is handled by the dwmac-sunxi driver, but

its configuration register is located in the CCU register range,
requiring proper regmap setup.

In order to do that, we use CLK_OF_DECLARE_DRIVER to initialize
sun7i ccu, which clears the OF_POPULATED flag, allowing the

platform device to probe the same resource with device node.

Signed-off-by: Priit Laes <pl...@plaes.org>
---

drivers/clk/sunxi-ng/ccu-sun6i-a31.c | 62 +++++++++++++++++++++++++++-

1 file changed, 60 insertions(+), 2 deletions(-)

diff --git a/drivers/clk/sunxi-ng/ccu-sun6i-a31.c b/drivers/clk/sunxi-ng/ccu-sun6i-a31.c
index 9b40d53266a3..3f6f9824b2ca 100644
--- a/drivers/clk/sunxi-ng/ccu-sun6i-a31.c
+++ b/drivers/clk/sunxi-ng/ccu-sun6i-a31.c
@@ -10,6 +10,8 @@

#include <linux/clk-provider.h>
#include <linux/io.h>
#include <linux/of_address.h>
+#include <linux/platform_device.h>
+#include <linux/regmap.h>

#include "ccu_common.h"
#include "ccu_reset.h"

@@ -1262,5 +1264,61 @@ static void __init sun6i_a31_ccu_setup(struct device_node *node)
ccu_mux_notifier_register(pll_cpu_clk.common.hw.clk,
&sun6i_a31_cpu_nb);
}
-CLK_OF_DECLARE(sun6i_a31_ccu, "allwinner,sun6i-a31-ccu",
- sun6i_a31_ccu_setup);
+CLK_OF_DECLARE_DRIVER(sun6i_a31_ccu, "allwinner,sun6i-a31-ccu",
+ sun6i_a31_ccu_setup);

+
+/*
+ * Regmap for the GMAC driver (dwmac-sunxi) to allow access to
+ * GMAC configuration register.
+ */

+#define SUN6I_A31_GMAC_CFG_REG 0xD0
+static bool sun6i_a31_ccu_regmap_accessible_reg(struct device *dev,

+ unsigned int reg)
+{

+ if (reg == SUN6I_A31_GMAC_CFG_REG)

+ return true;
+ return false;
+}
+

+static struct regmap_config sun6i_a31_ccu_regmap_config = {

+ .reg_bits = 32,
+ .val_bits = 32,
+ .reg_stride = 4,

+ .max_register = 0x308, /* clk_out_b */
+
+ .readable_reg = sun6i_a31_ccu_regmap_accessible_reg,
+ .writeable_reg = sun6i_a31_ccu_regmap_accessible_reg,
+};
+
+static int sun6i_a31_ccu_probe_regmap(struct platform_device *pdev)

+{
+ void __iomem *reg;
+ struct resource *res;
+ struct regmap *regmap;
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ reg = devm_ioremap(&pdev->dev, res->start, resource_size(res));
+ if (IS_ERR(reg))
+ return PTR_ERR(reg);
+
+ regmap = devm_regmap_init_mmio(&pdev->dev, reg,

+ &sun6i_a31_ccu_regmap_config);

+ if (IS_ERR(regmap))
+ return PTR_ERR(regmap);
+
+ return 0;
+}
+

+static const struct of_device_id sun6i_a31_ccu_ids[] = {
+ { .compatible = "allwinner,sun6i-a31-ccu"},
+ { }
+};
+
+static struct platform_driver sun6i_a31_ccu_driver = {
+ .probe = sun6i_a31_ccu_probe_regmap,
+ .driver = {
+ .name = "sun6i-a31-ccu",
+ .of_match_table = sun6i_a31_ccu_ids,
+ },
+};
+builtin_platform_driver(sun6i_a31_ccu_driver);
--
2.26.2

[Priit Laes]

Now that driver supports syscon-based regmap access, document also the
devicetree binding.

Signed-off-by: Priit Laes <pl...@plaes.org>
---

.../bindings/net/allwinner,sun7i-a20-gmac.yaml | 15 +++++++++++++--
1 file changed, 13 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/net/allwinner,sun7i-a20-gmac.yaml b/Documentation/devicetree/bindings/net/allwinner,sun7i-a20-gmac.yaml
index 703d0d886884..c41d7c598c19 100644
--- a/Documentation/devicetree/bindings/net/allwinner,sun7i-a20-gmac.yaml
+++ b/Documentation/devicetree/bindings/net/allwinner,sun7i-a20-gmac.yaml
@@ -29,17 +29,26 @@ properties:
clocks:
items:
- description: GMAC main clock
+
+ # Deprecated
- description: TX clock

clock-names:
items:
- const: stmmaceth
+
+ # Deprecated
- const: allwinner_gmac_tx

phy-supply:
description:
PHY regulator

+ syscon:
+ $ref: /schemas/types.yaml#definitions/phandle
+ description:
+ Phandle to the device containing the GMAC clock register
+
required:
- compatible
- reg
@@ -48,6 +57,7 @@ required:
- clocks
- clock-names
- phy-mode
+ - syscon

unevaluatedProperties: false

@@ -55,11 +65,12 @@ examples:
- |
gmac: ethernet@1c50000 {
compatible = "allwinner,sun7i-a20-gmac";
+ syscon = <&syscon>;
reg = <0x01c50000 0x10000>;
interrupts = <0 85 1>;
interrupt-names = "macirq";
- clocks = <&ahb_gates 49>, <&gmac_tx>;

- clock-names = "stmmaceth", "allwinner_gmac_tx";

+ clocks = <&ahb_gates 49>;
+ clock-names = "stmmaceth";
phy-mode = "mii";
};

--
2.26.2

[Priit Laes]

Use syscon-based approach to access gmac clock configuration

register, instead of relying on a custom clock driver.

As a bonus, we can now drop the custom clock implementation

and dummy clocks making sun7i fully CCU-compatible.

Signed-off-by: Priit Laes <pl...@plaes.org>
---

arch/arm/boot/dts/sun7i-a20.dtsi | 36 +++-----------------------------
1 file changed, 3 insertions(+), 33 deletions(-)

diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
index ffe1d10a1a84..750962a94fad 100644
--- a/arch/arm/boot/dts/sun7i-a20.dtsi
+++ b/arch/arm/boot/dts/sun7i-a20.dtsi
@@ -219,37 +219,6 @@ osc32k: clk-32k {
clock-frequency = <32768>;
clock-output-names = "osc32k";
};
-

- /*
- * The following two are dummy clocks, placeholders
- * used in the gmac_tx clock. The gmac driver will
- * choose one parent depending on the PHY interface
- * mode, using clk_set_rate auto-reparenting.
- *
- * The actual TX clock rate is not controlled by the
- * gmac_tx clock.
- */
- mii_phy_tx_clk: clk-mii-phy-tx {
- #clock-cells = <0>;
- compatible = "fixed-clock";
- clock-frequency = <25000000>;
- clock-output-names = "mii_phy_tx";
- };
-
- gmac_int_tx_clk: clk-gmac-int-tx {
- #clock-cells = <0>;
- compatible = "fixed-clock";
- clock-frequency = <125000000>;
- clock-output-names = "gmac_int_tx";
- };
-

- gmac_tx_clk: clk@1c20164 {

- #clock-cells = <0>;
- compatible = "allwinner,sun7i-a20-gmac-clk";

- reg = <0x01c20164 0x4>;

- clocks = <&mii_phy_tx_clk>, <&gmac_int_tx_clk>;
- clock-output-names = "gmac_tx";
- };
};

@@ -1511,11 +1480,12 @@ mali: gpu@1c40000 {

gmac: ethernet@1c50000 {
compatible = "allwinner,sun7i-a20-gmac";

+ syscon = <&ccu>;
reg = <0x01c50000 0x10000>;
interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "macirq";
- clocks = <&ccu CLK_AHB_GMAC>, <&gmac_tx_clk>;

- clock-names = "stmmaceth", "allwinner_gmac_tx";

+ clocks = <&ccu CLK_AHB_GMAC>;
+ clock-names = "stmmaceth";
snps,pbl = <2>;
snps,fixed-burst;
snps,force_sf_dma_mode;
--
2.26.2

[Rob Herring]

On Thu, 30 Apr 2020 14:57:00 +0300, Priit Laes wrote:
> Now that driver supports syscon-based regmap access, document also the
> devicetree binding.
>
> Signed-off-by: Priit Laes <pl...@plaes.org>
> ---
> .../bindings/net/allwinner,sun7i-a20-gmac.yaml | 15 +++++++++++++--
> 1 file changed, 13 insertions(+), 2 deletions(-)
>

My bot found errors running 'make dt_binding_check' on your patch:

/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/net/allwinner,sun7i-a20-gmac.example.dt.yaml: ethernet@1c50000: clock-names: ['stmmaceth'] is too short
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/net/allwinner,sun7i-a20-gmac.example.dt.yaml: ethernet@1c50000: clocks: [[4294967295, 49]] is too short

See https://patchwork.ozlabs.org/patch/1280292

If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure dt-schema is up to date:

pip3 install git+https://github.com/devicetree-org/dt-schema.git@master --upgrade

Please check and re-submit.