[PATCH] ARM: dts: sun8i-a83t: Add thermal trip points/cooling maps

[Ondrej Jirman]

This enables passive cooling by down-regulating CPU voltage
and frequency.

Signed-off-by: Ondrej Jirman <meg...@megous.com>
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 60 +++++++++++++++++++++++++++----
1 file changed, 54 insertions(+), 6 deletions(-)

diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi
index 74ac7ee9383cf..53c2b6a836f27 100644
--- a/arch/arm/boot/dts/sun8i-a83t.dtsi
+++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
@@ -72,7 +72,7 @@ cpu0: cpu@0 {
#cooling-cells = <2>;
};

- cpu@1 {
+ cpu1: cpu@1 {
compatible = "arm,cortex-a7";
device_type = "cpu";
clocks = <&ccu CLK_C0CPUX>;
@@ -83,7 +83,7 @@ cpu@1 {
#cooling-cells = <2>;
};

- cpu@2 {
+ cpu2: cpu@2 {
compatible = "arm,cortex-a7";
device_type = "cpu";
clocks = <&ccu CLK_C0CPUX>;
@@ -94,7 +94,7 @@ cpu@2 {
#cooling-cells = <2>;
};

- cpu@3 {
+ cpu3: cpu@3 {
compatible = "arm,cortex-a7";
device_type = "cpu";
clocks = <&ccu CLK_C0CPUX>;
@@ -116,7 +116,7 @@ cpu100: cpu@100 {
#cooling-cells = <2>;
};

- cpu@101 {
+ cpu101: cpu@101 {
compatible = "arm,cortex-a7";
device_type = "cpu";
clocks = <&ccu CLK_C1CPUX>;
@@ -127,7 +127,7 @@ cpu@101 {
#cooling-cells = <2>;
};

- cpu@102 {
+ cpu102: cpu@102 {
compatible = "arm,cortex-a7";
device_type = "cpu";
clocks = <&ccu CLK_C1CPUX>;
@@ -138,7 +138,7 @@ cpu@102 {
#cooling-cells = <2>;
};

- cpu@103 {
+ cpu103: cpu@103 {
compatible = "arm,cortex-a7";
device_type = "cpu";
clocks = <&ccu CLK_C1CPUX>;
@@ -1188,12 +1188,60 @@ cpu0_thermal: cpu0-thermal {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-sensors = <&ths 0>;
+
+ trips {
+ cpu0_hot: cpu-hot {
+ temperature = <80000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ cpu0_very_hot: cpu-very-hot {
+ temperature = <100000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+
+ cooling-maps {
+ cpu-hot-limit {
+ trip = <&cpu0_hot>;
+ cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+ };
};

cpu1_thermal: cpu1-thermal {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-sensors = <&ths 1>;
+
+ trips {
+ cpu1_hot: cpu-hot {
+ temperature = <80000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ cpu1_very_hot: cpu-very-hot {
+ temperature = <100000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+
+ cooling-maps {
+ cpu-hot-limit {
+ trip = <&cpu1_hot>;
+ cooling-device = <&cpu100 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu101 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu102 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu103 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+ };
};

gpu_thermal: gpu-thermal {
--
2.25.1

[Chen-Yu Tsai]

Hi,

On Sun, Feb 23, 2020 at 5:40 AM Ondrej Jirman <meg...@megous.com> wrote:
>
> This enables passive cooling by down-regulating CPU voltage
> and frequency.

Please state for the record how the trip points were derived. Were they from
the BSP? Or the user manual?

ChenYu

[Ondřej Jirman]

Hello,

The values are taken from the BSP for A83T:

https://megous.com/git/linux/tree/drivers/thermal/sunxi-temperature.c?h=a83t-3.4-bsp-tbs-a711#n747

The datasheet only mentions recommended Ta (ambient operating temperature) range
-20 to +70°C. So die voltages will be larger than that. I guess that roughly
matches the BSP values.

regards,
o.

> ChenYu

[Ondrej Jirman]

This enables passive cooling by down-regulating CPU voltage
and frequency.

For the trip points, I used values from the BSP code directly.

The critical trip point value is 30°C above the maximum recommended
ambient temperature (70°C) for the SoC from the datasheet, so there's
some headroom even at such a high ambient temperature.

Signed-off-by: Ondrej Jirman <meg...@megous.com>
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 60 +++++++++++++++++++++++++++----
1 file changed, 54 insertions(+), 6 deletions(-)

v2:
- added more detail to the commit description

[Daniel Lezcano]

No polling to mitigate?

> polling-delay = <0>;
> thermal-sensors = <&ths 1>;
> +
> + trips {
> + cpu1_hot: cpu-hot {
> + temperature = <80000>;
> + hysteresis = <2000>;
> + type = "passive";

I'm curious, can you really reach this temperature with a cortex-a7
running at 1.2GHz max?

> + };
> +
> + cpu1_very_hot: cpu-very-hot {
> + temperature = <100000>;
> + hysteresis = <0>;
> + type = "critical";
> + };
> + };
> +
> + cooling-maps {
> + cpu-hot-limit {
> + trip = <&cpu1_hot>;
> + cooling-device = <&cpu100 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> + <&cpu101 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> + <&cpu102 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> + <&cpu103 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
> + };
> + };
> };
>
> gpu_thermal: gpu-thermal {
>


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[Ondřej Jirman]

Hi,

On Mon, Feb 24, 2020 at 06:06:20PM +0100, Daniel Lezcano wrote:
> On 24/02/2020 17:54, Ondrej Jirman wrote:
> > This enables passive cooling by down-regulating CPU voltage

Polling to mitigate what?

The driver is using interrupts whenever new reading is available, and
notifies tz of the change. I don't have a reason to believe any new
values are available from thermal sensor outside of the interrupt
period.

> > polling-delay = <0>;
> > thermal-sensors = <&ths 1>;
> > +
> > + trips {
> > + cpu1_hot: cpu-hot {
> > + temperature = <80000>;
> > + hysteresis = <2000>;
> > + type = "passive";
>
> I'm curious, can you really reach this temperature with a cortex-a7
> running at 1.2GHz max?

That depends on ambient temperature. I'd say easily. My A83T is running
iniside enclosed space with no cooling other than dissipating heat to
the board.

Anyway, I'm running my A83T boards at 1.8GHz. And A83T can run up to 2GHz
at the best SoC bin.

I'll probably submit updated cpufreq table at some point too, once I fix
it up to use the SoC bin information.

https://megous.com/git/linux/commit/?h=ths-5.6&id=171b7c3c3db98b5939d28d0c96b384edda95cec3

regards,
o.

[Ondřej Jirman]

To be more clear, new temperatures are available from the thermal sensor driver
at the rate of 4 per second, which should be enough to do quick adjustments to
the thermal zone/cooling device even for quick temperature rises.

https://elixir.bootlin.com/linux/v5.6-rc3/source/drivers/thermal/sun8i_thermal.c#L442

There's no slow/fast period depending on whether the cooling is active.
It's always fast and no polling of the thermal sensor is needed.

regards,
o.

[Daniel Lezcano]

On 24/02/2020 18:39, Ondřej Jirman wrote:
> On Mon, Feb 24, 2020 at 06:23:28PM +0100, megous hlavni wrote:
>> Hi,
>>
>> On Mon, Feb 24, 2020 at 06:06:20PM +0100, Daniel Lezcano wrote:
>>> On 24/02/2020 17:54, Ondrej Jirman wrote:
>>>> This enables passive cooling by down-regulating CPU voltage
>>>> clocks = <&ccu CLK_C1CPUX>;
>>>> @@ -1188,12 +1188,60 @@ cpu0_thermal: cpu0-thermal {
>>>> polling-delay-passive = <0>;
>>>> polling-delay = <0>;
>>>> thermal-sensors = <&ths 0>;
>>>> +
>>>> + trips {

>>>> + ': cpu-hot {

Thanks for the clarification. All sensors have their specificity.

Does the sensor allow to create a threshold temperature where an
interrupt fires when crossing the boundary? That would be interesting
for performance and energy saving to disable the interrupts until
'cpu0_hot' is reached, no?

[Ondřej Jirman]

I think so. I don't think it would affect this binding though. It would still
require no polling, and thermal driver would probably just have to be updated
to get the relevant information about trip points from the thermal zone and
notify it of changes/trip point crossing.

I don't think it would affect performance or energy saving much though.
4 interrupts per second is barely noticeable, and there are much bigger
fish to fry, when it comes to power savings on A83T at this point.

thank you and regards,
o.