[PATCH v4 0/7] Allwinner H6 SPDIF support

[Clément Péron]

*H6 DMA support IS REQUIRED*

Allwinner H6 SoC has a SPDIF controller called One Wire Audio (OWA) which
is different from the previous H3 generation and not compatible.

Difference are an increase of fifo sizes, some memory mapping are different
and there is now the possibility to output the master clock on a pin.

Actually all these features are unused and only a bit for flushing the TX
fifo is required.

Also this series requires the DMA working on H6, a first version has been
submitted by Jernej Škrabec[1] but has not been accepted yet.

[1] https://patchwork.kernel.org/project/linux-arm-kernel/list/?series=89011

Changes since v3:
- rename reg_fctl_ftx to val_fctl_ftx
- rebase this series on sound-next
- fix dt-bindings due to change in sound-next
- change node name sound_spdif to sound-spdif

Changes since v2:
- Split quirks and H6 support patch
- Add specific section for quirks comment

Changes since v1:
- Remove H3 compatible
- Add TX fifo bit flush quirks
- Add H6 bindings in SPDIF driver

Clément Péron (7):
dt-bindings: sound: sun4i-spdif: Add Allwinner H6 compatible
ASoC: sun4i-spdif: Move quirks to the top
ASoC: sun4i-spdif: Add TX fifo bit flush quirks
ASoC: sun4i-spdif: Add support for H6 SoC
arm64: dts: allwinner: Add SPDIF node for Allwinner H6
arm64: dts: allwinner: h6: Enable SPDIF for Beelink GS1
arm64: defconfig: Enable Sun4i SPDIF module

.../sound/allwinner,sun4i-a10-spdif.yaml | 1 +
.../dts/allwinner/sun50i-h6-beelink-gs1.dts | 4 ++
arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 38 ++++++++++++++
arch/arm64/configs/defconfig | 1 +
sound/soc/sunxi/sun4i-spdif.c | 49 ++++++++++++++++---
5 files changed, 87 insertions(+), 6 deletions(-)

--
2.20.1

[Clément Péron]

Allwinner H6 has a SPDIF controller with an increase of the fifo
size and a sligher difference in memory mapping compare to H3/A64.

This make it not compatible with the previous generation.

Introduce a specific bindings for H6 SoC.

Signed-off-by: Clément Péron <peron...@gmail.com>
Reviewed-by: Rob Herring <ro...@kernel.org>
Acked-by: Maxime Ripard <maxime...@bootlin.com>
---
.../devicetree/bindings/sound/allwinner,sun4i-a10-spdif.yaml | 1 +
1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/sound/allwinner,sun4i-a10-spdif.yaml b/Documentation/devicetree/bindings/sound/allwinner,sun4i-a10-spdif.yaml
index a49ef2294a74..e0284d8c3b63 100644
--- a/Documentation/devicetree/bindings/sound/allwinner,sun4i-a10-spdif.yaml
+++ b/Documentation/devicetree/bindings/sound/allwinner,sun4i-a10-spdif.yaml
@@ -21,6 +21,7 @@ properties:
- const: allwinner,sun4i-a10-spdif
- const: allwinner,sun6i-a31-spdif
- const: allwinner,sun8i-h3-spdif
+ - const: allwinner,sun50i-h6-spdif
- items:
- const: allwinner,sun8i-a83t-spdif
- const: allwinner,sun8i-h3-spdif
--
2.20.1

[Clément Péron]

The quirks are actually defines in the middle of the file with
short explanation.

Move this at the top and add a section to have coherency with
sun4i-i2s.

Signed-off-by: Clément Péron <peron...@gmail.com>

Acked-by: Maxime Ripard <maxime...@bootlin.com>
---

sound/soc/sunxi/sun4i-spdif.c | 16 +++++++++++-----
1 file changed, 11 insertions(+), 5 deletions(-)

diff --git a/sound/soc/sunxi/sun4i-spdif.c b/sound/soc/sunxi/sun4i-spdif.c
index b4af4aabead1..b6c66a62e915 100644
--- a/sound/soc/sunxi/sun4i-spdif.c
+++ b/sound/soc/sunxi/sun4i-spdif.c
@@ -161,6 +161,17 @@
#define SUN4I_SPDIF_SAMFREQ_176_4KHZ 0xc
#define SUN4I_SPDIF_SAMFREQ_192KHZ 0xe

+/**
+ * struct sun4i_spdif_quirks - Differences between SoC variants.
+ *
+ * @reg_dac_tx_data: TX FIFO offset for DMA config.
+ * @has_reset: SoC needs reset deasserted.
+ */
+struct sun4i_spdif_quirks {
+ unsigned int reg_dac_txdata;
+ bool has_reset;
+};
+
struct sun4i_spdif_dev {
struct platform_device *pdev;
struct clk *spdif_clk;
@@ -405,11 +416,6 @@ static struct snd_soc_dai_driver sun4i_spdif_dai = {
.name = "spdif",
};

-struct sun4i_spdif_quirks {
- unsigned int reg_dac_txdata; /* TX FIFO offset for DMA config */
- bool has_reset;
-};
-
static const struct sun4i_spdif_quirks sun4i_a10_spdif_quirks = {
.reg_dac_txdata = SUN4I_SPDIF_TXFIFO,
};
--
2.20.1

[Clément Péron]

Allwinner H6 has a different bit to flush the TX FIFO.

Add a quirks to prepare introduction of H6 SoC.

Signed-off-by: Clément Péron <peron...@gmail.com>
---
sound/soc/sunxi/sun4i-spdif.c | 11 ++++++++++-
1 file changed, 10 insertions(+), 1 deletion(-)

diff --git a/sound/soc/sunxi/sun4i-spdif.c b/sound/soc/sunxi/sun4i-spdif.c
index b6c66a62e915..045d0cc4b62a 100644
--- a/sound/soc/sunxi/sun4i-spdif.c
+++ b/sound/soc/sunxi/sun4i-spdif.c
@@ -166,10 +166,12 @@
*

* @reg_dac_tx_data: TX FIFO offset for DMA config.

* @has_reset: SoC needs reset deasserted.

+ * @val_fctl_ftx: TX FIFO flush bitmask.
*/
struct sun4i_spdif_quirks {
unsigned int reg_dac_txdata;
bool has_reset;
+ unsigned int val_fctl_ftx;
};

struct sun4i_spdif_dev {
@@ -180,16 +182,19 @@ struct sun4i_spdif_dev {
struct snd_soc_dai_driver cpu_dai_drv;
struct regmap *regmap;
struct snd_dmaengine_dai_dma_data dma_params_tx;
+ const struct sun4i_spdif_quirks *quirks;
};

static void sun4i_spdif_configure(struct sun4i_spdif_dev *host)
{
+ const struct sun4i_spdif_quirks *quirks = host->quirks;
+
/* soft reset SPDIF */
regmap_write(host->regmap, SUN4I_SPDIF_CTL, SUN4I_SPDIF_CTL_RESET);

/* flush TX FIFO */
regmap_update_bits(host->regmap, SUN4I_SPDIF_FCTL,
- SUN4I_SPDIF_FCTL_FTX, SUN4I_SPDIF_FCTL_FTX);
+ quirks->val_fctl_ftx, quirks->val_fctl_ftx);

/* clear TX counter */
regmap_write(host->regmap, SUN4I_SPDIF_TXCNT, 0);
@@ -418,15 +423,18 @@ static struct snd_soc_dai_driver sun4i_spdif_dai = {

static const struct sun4i_spdif_quirks sun4i_a10_spdif_quirks = {
.reg_dac_txdata = SUN4I_SPDIF_TXFIFO,

+ .val_fctl_ftx = SUN4I_SPDIF_FCTL_FTX,
};

static const struct sun4i_spdif_quirks sun6i_a31_spdif_quirks = {
.reg_dac_txdata = SUN4I_SPDIF_TXFIFO,
+ .val_fctl_ftx = SUN4I_SPDIF_FCTL_FTX,
.has_reset = true,
};

static const struct sun4i_spdif_quirks sun8i_h3_spdif_quirks = {
.reg_dac_txdata = SUN8I_SPDIF_TXFIFO,
+ .val_fctl_ftx = SUN4I_SPDIF_FCTL_FTX,
.has_reset = true,
};

@@ -507,6 +515,7 @@ static int sun4i_spdif_probe(struct platform_device *pdev)
dev_err(&pdev->dev, "Failed to determine the quirks to use\n");
return -ENODEV;
}
+ host->quirks = quirks;

host->regmap = devm_regmap_init_mmio(&pdev->dev, base,
&sun4i_spdif_regmap_config);
--
2.20.1

[Clément Péron]

Allwinner H6 has a different mapping for the fifo register controller.

Actually only the fifo TX bit is used in the drivers.

Use the freshly introduced quirks to make this drivers compatible with
the Allwinner H6.

Signed-off-by: Clément Péron <peron...@gmail.com>
---

sound/soc/sunxi/sun4i-spdif.c | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)

diff --git a/sound/soc/sunxi/sun4i-spdif.c b/sound/soc/sunxi/sun4i-spdif.c
index 045d0cc4b62a..54c09346d298 100644
--- a/sound/soc/sunxi/sun4i-spdif.c
+++ b/sound/soc/sunxi/sun4i-spdif.c
@@ -75,6 +75,18 @@
#define SUN4I_SPDIF_FCTL_RXOM(v) ((v) << 0)
#define SUN4I_SPDIF_FCTL_RXOM_MASK GENMASK(1, 0)

+#define SUN50I_H6_SPDIF_FCTL (0x14)
+ #define SUN50I_H6_SPDIF_FCTL_HUB_EN BIT(31)
+ #define SUN50I_H6_SPDIF_FCTL_FTX BIT(30)
+ #define SUN50I_H6_SPDIF_FCTL_FRX BIT(29)
+ #define SUN50I_H6_SPDIF_FCTL_TXTL(v) ((v) << 12)
+ #define SUN50I_H6_SPDIF_FCTL_TXTL_MASK GENMASK(19, 12)
+ #define SUN50I_H6_SPDIF_FCTL_RXTL(v) ((v) << 4)
+ #define SUN50I_H6_SPDIF_FCTL_RXTL_MASK GENMASK(10, 4)
+ #define SUN50I_H6_SPDIF_FCTL_TXIM BIT(2)
+ #define SUN50I_H6_SPDIF_FCTL_RXOM(v) ((v) << 0)
+ #define SUN50I_H6_SPDIF_FCTL_RXOM_MASK GENMASK(1, 0)
+
#define SUN4I_SPDIF_FSTA (0x18)
#define SUN4I_SPDIF_FSTA_TXE BIT(14)
#define SUN4I_SPDIF_FSTA_TXECNTSHT (8)
@@ -438,6 +450,12 @@ static const struct sun4i_spdif_quirks sun8i_h3_spdif_quirks = {
.has_reset = true,
};

+static const struct sun4i_spdif_quirks sun50i_h6_spdif_quirks = {
+ .reg_dac_txdata = SUN8I_SPDIF_TXFIFO,
+ .val_fctl_ftx = SUN50I_H6_SPDIF_FCTL_FTX,
+ .has_reset = true,
+};
+
static const struct of_device_id sun4i_spdif_of_match[] = {
{
.compatible = "allwinner,sun4i-a10-spdif",
@@ -451,6 +469,10 @@ static const struct of_device_id sun4i_spdif_of_match[] = {
.compatible = "allwinner,sun8i-h3-spdif",
.data = &sun8i_h3_spdif_quirks,
},
+ {
+ .compatible = "allwinner,sun50i-h6-spdif",
+ .data = &sun50i_h6_spdif_quirks,
+ },
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, sun4i_spdif_of_match);
--
2.20.1

[Clément Péron]

The Allwinner H6 has a SPDIF controller called OWA (One Wire Audio).

Only one pinmuxing is available so set it as default.

Signed-off-by: Clément Péron <peron...@gmail.com>
---

arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 38 ++++++++++++++++++++
1 file changed, 38 insertions(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
index f4ea596c82ce..e0ca23704719 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
@@ -83,6 +83,24 @@
method = "smc";
};

+ sound-spdif {
+ compatible = "simple-audio-card";
+ simple-audio-card,name = "On-board SPDIF";
+
+ simple-audio-card,cpu {
+ sound-dai = <&spdif>;
+ };
+
+ simple-audio-card,codec {
+ sound-dai = <&spdif_out>;
+ };
+ };
+
+ spdif_out: spdif-out {
+ #sound-dai-cells = <0>;
+ compatible = "linux,spdif-dit";
+ };
+
timer {
compatible = "arm,armv8-timer";
interrupts = <GIC_PPI 13
@@ -273,6 +291,11 @@
bias-pull-up;
};

+ spdif_tx_pin: spdif-tx-pin {
+ pins = "PH7";
+ function = "spdif";
+ };
+
uart0_ph_pins: uart0-ph-pins {
pins = "PH0", "PH1";
function = "uart0";
@@ -402,6 +425,21 @@
};
};

+ spdif: spdif@5093000 {
+ #sound-dai-cells = <0>;
+ compatible = "allwinner,sun50i-h6-spdif";
+ reg = <0x05093000 0x400>;
+ interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_SPDIF>, <&ccu CLK_SPDIF>;
+ clock-names = "apb", "spdif";
+ resets = <&ccu RST_BUS_SPDIF>;
+ dmas = <&dma 2>;
+ dma-names = "tx";
+ pinctrl-names = "default";
+ pinctrl-0 = <&spdif_tx_pin>;
+ status = "disabled";
+ };
+
usb2otg: usb@5100000 {
compatible = "allwinner,sun50i-h6-musb",
"allwinner,sun8i-a33-musb";
--
2.20.1

[Clément Péron]

Beelink GS1 board has a SPDIF out connector, so enable it in
the device-tree.

Signed-off-by: Clément Péron <peron...@gmail.com>
---

arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts | 4 ++++
1 file changed, 4 insertions(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts
index 0dc33c90dd60..76a95ad33dc5 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts
@@ -243,6 +243,10 @@
vcc-pm-supply = <&reg_aldo1>;
};

+&spdif {
+ status = "okay";
+};
+
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_ph_pins>;
--
2.20.1

[Clément Péron]

Allwinner A64 and H6 use the Sun4i SPDIF driver.

Enable this to allow a proper support.

Signed-off-by: Clément Péron <peron...@gmail.com>
---

arch/arm64/configs/defconfig | 1 +

1 file changed, 1 insertion(+)

diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index b535f0f412cc..de5b65d45311 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -526,6 +526,7 @@ CONFIG_SND_SOC_ROCKCHIP_RT5645=m
CONFIG_SND_SOC_RK3399_GRU_SOUND=m
CONFIG_SND_SOC_SAMSUNG=y
CONFIG_SND_SOC_RCAR=m
+CONFIG_SND_SUN4I_SPDIF=m
CONFIG_SND_SOC_AK4613=m
CONFIG_SND_SOC_ES7134=m
CONFIG_SND_SOC_ES7241=m
--
2.20.1

[Maxime Ripard]

On Mon, May 27, 2019 at 10:06:23PM +0200, Clément Péron wrote:
> Allwinner H6 has a different bit to flush the TX FIFO.
>
> Add a quirks to prepare introduction of H6 SoC.
>
> Signed-off-by: Clément Péron <peron...@gmail.com>

Acked-by: Maxime Ripard <maxime...@bootlin.com>

Maxime

--
Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com

[Maxime Ripard]

On Mon, May 27, 2019 at 10:06:24PM +0200, Clément Péron wrote:
> Allwinner H6 has a different mapping for the fifo register controller.
>
> Actually only the fifo TX bit is used in the drivers.
>
> Use the freshly introduced quirks to make this drivers compatible with
> the Allwinner H6.
>
> Signed-off-by: Clément Péron <peron...@gmail.com>

[Clément Péron]

Hi,

On Mon, 27 May 2019 at 22:10, Clément Péron <peron...@gmail.com> wrote:
>
> *H6 DMA support IS REQUIRED*

DMA has been merged, so this series can be merge when ASoC maintainers
have reviewed it.

Regards,
Clément

[Clément Péron]

Hi,

I'm missing ACK from ASoC Maintainers patch 2-3-4.

It's really small paches, if you could have a look at it.
Many thanks,
Clément

[Mark Brown]

On Mon, Jul 15, 2019 at 09:21:01PM +0200, Clément Péron wrote:
> Hi,
>
> I'm missing ACK from ASoC Maintainers patch 2-3-4.
>
> It's really small paches, if you could have a look at it.

Please don't send content free pings and please allow a reasonable time
for review. People get busy, go on holiday, attend conferences and so
on so unless there is some reason for urgency (like critical bug fixes)
please allow at least a couple of weeks for review. If there have been
review comments then people may be waiting for those to be addressed.

Sending content free pings adds to the mail volume (if they are seen at
all) which is often the problem and since they can't be reviewed
directly if something has gone wrong you'll have to resend the patches
anyway, so sending again is generally a better approach though there are
some other maintainers who like them - if in doubt look at how patches
for the subsystem are normally handled.

[Clément Péron]

Hi,

Sorry, I just discovered that the ASoC patches have been merged into
the broonie and linus tree in 5.3.

I'm still quite new in the sending of patches to the Kernel but
souldn't be a ack or a mail sent to warn the sender when the series
are accepted?

Should 5/6/7 patches be picked by Sunxi maintainer?

Thanks,
Clément

[Clément Péron]

Allwinner H6 SoC has a SPDIF controller called One Wire Audio (OWA) which
is different from the previous H3 generation and not compatible.

Difference are an increase of fifo sizes, some memory mapping are different
and there is now the possibility to output the master clock on a pin.

Actually all these features are unused and only a bit for flushing the TX
fifo is required.

Changes since v4:
- rename audio card name to sun50i-h6-spdif
- drop patches already merged

Changes since v3:
- rename reg_fctl_ftx to val_fctl_ftx
- rebase this series on sound-next
- fix dt-bindings due to change in sound-next
- change node name sound_spdif to sound-spdif

Changes since v2:
- Split quirks and H6 support patch
- Add specific section for quirks comment

Changes since v1:
- Remove H3 compatible
- Add TX fifo bit flush quirks
- Add H6 bindings in SPDIF driver

Clément Péron (3):

arm64: dts: allwinner: Add SPDIF node for Allwinner H6
arm64: dts: allwinner: h6: Enable SPDIF for Beelink GS1
arm64: defconfig: Enable Sun4i SPDIF module

.../dts/allwinner/sun50i-h6-beelink-gs1.dts | 4 ++
arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 38 +++++++++++++++++++
arch/arm64/configs/defconfig | 1 +
3 files changed, 43 insertions(+)

--
2.20.1

[Clément Péron]

Beelink GS1 board has a SPDIF out connector, so enable it in
the device-tree.

Signed-off-by: Clément Péron <peron...@gmail.com>
---

[Clément Péron]

Allwinner A64 and H6 use the Sun4i SPDIF driver.

Enable this to allow a proper support.

Signed-off-by: Clément Péron <peron...@gmail.com>
---

arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)

diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig

index 0e58ef02880c..b0638849c14c 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -558,6 +558,7 @@ CONFIG_SND_SOC_ROCKCHIP_RT5645=m

[Chen-Yu Tsai]

On Mon, Aug 12, 2019 at 4:32 AM Clément Péron <peron...@gmail.com> wrote:
>
> Allwinner A64 and H6 use the Sun4i SPDIF driver.
>
> Enable this to allow a proper support.
>
> Signed-off-by: Clément Péron <peron...@gmail.com>

Applied. Thanks.

[Clément Péron]

Allwinner H6 SoC has a SPDIF controller called One Wire Audio (OWA) which
is different from the previous H3 generation and not compatible.

Difference are an increase of fifo sizes, some memory mapping are different
and there is now the possibility to output the master clock on a pin.

Actually all these features are unused and only a bit for flushing the TX
fifo is required.

Changes since v5:
- Move soundcard to board device-tree

Changes since v4:
- rename audio card name to sun50i-h6-spdif
- drop patches already merged

Changes since v3:
- rename reg_fctl_ftx to val_fctl_ftx
- rebase this series on sound-next
- fix dt-bindings due to change in sound-next
- change node name sound_spdif to sound-spdif

Changes since v2:
- Split quirks and H6 support patch
- Add specific section for quirks comment

Changes since v1:
- Remove H3 compatible
- Add TX fifo bit flush quirks
- Add H6 bindings in SPDIF driver

Clément Péron (2):

arm64: dts: allwinner: Add SPDIF node for Allwinner H6
arm64: dts: allwinner: h6: Enable SPDIF for Beelink GS1

.../dts/allwinner/sun50i-h6-beelink-gs1.dts | 22 +++++++++++++++++++
arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 20 +++++++++++++++++
2 files changed, 42 insertions(+)

--
2.20.1

[Clément Péron]

Beelink GS1 board has a SPDIF out connector, so enable it in

the device-tree and add a simple SPDIF soundcard.

Signed-off-by: Clément Péron <peron...@gmail.com>
---

.../dts/allwinner/sun50i-h6-beelink-gs1.dts | 22 +++++++++++++++++++
1 file changed, 22 insertions(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts
index 0dc33c90dd60..4bd14f085070 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts
@@ -51,6 +51,24 @@
regulator-max-microvolt = <5000000>;
regulator-always-on;
};
+

+ sound-spdif {
+ compatible = "simple-audio-card";

+ simple-audio-card,name = "sun50i-h6-spdif";

+
+ simple-audio-card,cpu {
+ sound-dai = <&spdif>;
+ };
+
+ simple-audio-card,codec {
+ sound-dai = <&spdif_out>;
+ };
+ };
+
+ spdif_out: spdif-out {
+ #sound-dai-cells = <0>;
+ compatible = "linux,spdif-dit";
+ };

};

&de {
@@ -243,6 +261,10 @@

[Clément Péron]

The Allwinner H6 has a SPDIF controller called OWA (One Wire Audio).

Only one pinmuxing is available so set it as default.

Signed-off-by: Clément Péron <peron...@gmail.com>
---

arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
index 7628a7c83096..2ba9ab9e0924 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi

@@ -282,6 +282,11 @@
bias-pull-up;
};

+ spdif_tx_pin: spdif-tx-pin {
+ pins = "PH7";
+ function = "spdif";
+ };
+
uart0_ph_pins: uart0-ph-pins {
pins = "PH0", "PH1";
function = "uart0";
@@ -411,6 +416,21 @@
};
};

+ spdif: spdif@5093000 {

+ #sound-dai-cells = <0>;

[Mark Brown]

On Sat, Aug 10, 2019 at 10:45:23AM +0200, Clément Péron wrote:

> Hi,

Please don't top post, reply in line with needed context. This allows
readers to readily follow the flow of conversation and understand what
you are talking about and also helps ensure that everything in the
discussion is being addressed.

> Sorry, I just discovered that the ASoC patches have been merged into
> the broonie and linus tree in 5.3.

> I'm still quite new in the sending of patches to the Kernel but
> souldn't be a ack or a mail sent to warn the sender when the series
> are accepted?

Not every maintainer will send those, I do but you might find they've
gone into your spam folder if you're using gmail.

[Maxime Ripard]

On Mon, Aug 12, 2019 at 12:51:13PM +0200, Clément Péron wrote:
> Allwinner H6 SoC has a SPDIF controller called One Wire Audio (OWA) which
> is different from the previous H3 generation and not compatible.
>
> Difference are an increase of fifo sizes, some memory mapping are different
> and there is now the possibility to output the master clock on a pin.
>
> Actually all these features are unused and only a bit for flushing the TX
> fifo is required.

Applied both, thanks

[Clément Péron]

Hi Mark,

Thank you very much for the answer,
Regards,
Clément