[PATCH 1/2] Cell configs for imx8mq EVK board.

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Alice Guo

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Mar 23, 2020, 5:43:55 AM3/23/20
to jailho...@googlegroups.com, peng...@nxp.com, Alice Guo
Signed-off-by: Alice Guo <alic...@nxp.com>
---
configs/arm64/imx8mq-inmate-demo.c | 4 +-
configs/arm64/imx8mq-ivshmem-demo.c | 124 ++++++++++++++++++++++
configs/arm64/imx8mq-linux-demo.c | 158 ++++++++++++++++++++++++++++
configs/arm64/imx8mq.c | 93 ++++++++++++++--
4 files changed, 369 insertions(+), 10 deletions(-)
create mode 100644 configs/arm64/imx8mq-ivshmem-demo.c
create mode 100644 configs/arm64/imx8mq-linux-demo.c

diff --git a/configs/arm64/imx8mq-inmate-demo.c b/configs/arm64/imx8mq-inmate-demo.c
index 8c1ad624..af57ebe9 100644
--- a/configs/arm64/imx8mq-inmate-demo.c
+++ b/configs/arm64/imx8mq-inmate-demo.c
@@ -1,7 +1,7 @@
/*
* iMX8MQ target - inmate demo
*
- * Copyright NXP 2018
+ * Copyright 2018-2019 NXP
*
* Authors:
* Peng Fan <peng...@nxp.com>
@@ -50,7 +50,7 @@ struct {
JAILHOUSE_MEM_IO | JAILHOUSE_MEM_ROOTSHARED,
},
/* RAM: Top at 4GB Space */ {
- .phys_start = 0xffaf0000,
+ .phys_start = 0xc0000000,
.virt_start = 0,
.size = 0x00010000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
diff --git a/configs/arm64/imx8mq-ivshmem-demo.c b/configs/arm64/imx8mq-ivshmem-demo.c
new file mode 100644
index 00000000..d7b8f0a6
--- /dev/null
+++ b/configs/arm64/imx8mq-ivshmem-demo.c
@@ -0,0 +1,124 @@
+/*
+ * iMX8MQ target - ivshmem-demo
+ *
+ * Copyright 2018 NXP
+ *
+ * Authors:
+ * Peng Fan <peng...@nxp.com>
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2. See
+ * the COPYING file in the top-level directory.
+ */
+
+#include <jailhouse/types.h>
+#include <jailhouse/cell-config.h>
+
+struct {
+ struct jailhouse_cell_desc cell;
+ __u64 cpus[1];
+ struct jailhouse_memory mem_regions[12];
+ struct jailhouse_irqchip irqchips[1];
+ struct jailhouse_pci_device pci_devices[1];
+} __attribute__((packed)) config = {
+ .cell = {
+ .signature = JAILHOUSE_CELL_DESC_SIGNATURE,
+ .revision = JAILHOUSE_CONFIG_REVISION,
+ .name = "ivshmem-demo",
+ .flags = JAILHOUSE_CELL_PASSIVE_COMMREG,
+
+ .cpu_set_size = sizeof(config.cpus),
+ .num_memory_regions = ARRAY_SIZE(config.mem_regions),
+ .num_irqchips = ARRAY_SIZE(config.irqchips),
+ .num_pci_devices = ARRAY_SIZE(config.pci_devices),
+ .vpci_irq_base = 108, /* Not include 32 base */
+
+ .console = {
+ .address = 0x30860000,
+ .type = JAILHOUSE_CON_TYPE_IMX,
+ .flags = JAILHOUSE_CON_ACCESS_MMIO |
+ JAILHOUSE_CON_REGDIST_4,
+ },
+ },
+
+ .cpus = {
+ 0x8,
+ },
+
+ .mem_regions = {
+ /* IVHSMEM shared memory region for 00:00.0 */ {
+ .phys_start = 0xbfd00000,
+ .virt_start = 0xbfd00000,
+ .size = 0x1000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_ROOTSHARED,
+ },
+ {
+ .phys_start = 0xbfd01000,
+ .virt_start = 0xbfd01000,
+ .size = 0x9000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_ROOTSHARED,
+ },
+ {
+ .phys_start = 0xbfd0a000,
+ .virt_start = 0xbfd0a000,
+ .size = 0x2000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_ROOTSHARED,
+ },
+ {
+ .phys_start = 0xbfd0c000,
+ .virt_start = 0xbfd0c000,
+ .size = 0x2000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_ROOTSHARED,
+ },
+ {
+ .phys_start = 0xbfd0e000,
+ .virt_start = 0xbfd0e000,
+ .size = 0x2000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_ROOTSHARED,
+ },
+ /* UART1 */ {
+ .phys_start = 0x30860000,
+ .virt_start = 0x30860000,
+ .size = 0x1000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO | JAILHOUSE_MEM_ROOTSHARED,
+ },
+ /* RAM: Bottom at 4GB Space */ {
+ .phys_start = 0xc0000000,
+ .virt_start = 0,
+ .size = 0x00010000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_LOADABLE,
+ },
+ /* communication region */ {
+ .virt_start = 0x80000000,
+ .size = 0x00001000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_COMM_REGION,
+ },
+ },
+
+ .irqchips = {
+ /* GIC */ {
+ .address = 0x38800000,
+ .pin_base = 128,
+ .pin_bitmap = {
+ 0x1 << (108 + 32 - 128) /* SPI 109 */
+ },
+ },
+ },
+
+ .pci_devices = {
+ { /* IVSHMEM 00:00.0 (demo) */
+ .type = JAILHOUSE_PCI_TYPE_IVSHMEM,
+ .domain = 1,
+ .bdf = 0 << 3,
+ .bar_mask = JAILHOUSE_IVSHMEM_BAR_MASK_INTX,
+ .shmem_regions_start = 0,
+ .shmem_dev_id = 1,
+ .shmem_peers = 1,
+ .shmem_protocol = JAILHOUSE_SHMEM_PROTO_UNDEFINED,
+ },
+ },
+};
diff --git a/configs/arm64/imx8mq-linux-demo.c b/configs/arm64/imx8mq-linux-demo.c
new file mode 100644
index 00000000..a59dd934
--- /dev/null
+++ b/configs/arm64/imx8mq-linux-demo.c
@@ -0,0 +1,158 @@
+/*
+ * iMX8MQ target - linux-demo
+ *
+ * Copyright 2018 NXP
+ *
+ * Authors:
+ * Peng Fan <peng...@nxp.com>
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2. See
+ * the COPYING file in the top-level directory.
+ */
+
+#include <jailhouse/types.h>
+#include <jailhouse/cell-config.h>
+
+struct {
+ struct jailhouse_cell_desc cell;
+ __u64 cpus[1];
+ struct jailhouse_memory mem_regions[15];
+ struct jailhouse_irqchip irqchips[2];
+ struct jailhouse_pci_device pci_devices[2];
+} __attribute__((packed)) config = {
+ .cell = {
+ .signature = JAILHOUSE_CELL_DESC_SIGNATURE,
+ .revision = JAILHOUSE_CONFIG_REVISION,
+ .name = "linux-inmate-demo",
+ .flags = JAILHOUSE_CELL_PASSIVE_COMMREG,
+
+ .cpu_set_size = sizeof(config.cpus),
+ .num_memory_regions = ARRAY_SIZE(config.mem_regions),
+ .num_irqchips = ARRAY_SIZE(config.irqchips),
+ .num_pci_devices = ARRAY_SIZE(config.pci_devices),
+ .vpci_irq_base = 108, /* Not include 32 base */
+ },
+
+ .cpus = {
+ 0xc,
+ },
+
+ .mem_regions = {
+ /* IVHSMEM shared memory region for 00:00.0 */ {
+ .phys_start = 0xbfd00000,
+ .virt_start = 0xbfd00000,
+ .size = 0x1000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_ROOTSHARED,
+ },
+ {
+ .phys_start = 0xbfd01000,
+ .virt_start = 0xbfd01000,
+ .size = 0x9000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_ROOTSHARED,
+ },
+ {
+ .phys_start = 0xbfd0a000,
+ .virt_start = 0xbfd0a000,
+ .size = 0x2000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_ROOTSHARED,
+ },
+ {
+ .phys_start = 0xbfd0c000,
+ .virt_start = 0xbfd0c000,
+ .size = 0x2000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_ROOTSHARED,
+ },
+ {
+ .phys_start = 0xbfd0e000,
+ .virt_start = 0xbfd0e000,
+ .size = 0x2000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_ROOTSHARED,
+ },
+ /* IVSHMEM shared memory regions for 00:01.0 (networking) */
+ JAILHOUSE_SHMEM_NET_REGIONS(0xbfe00000, 1),
+ /* UART1 earlycon */ {
+ .phys_start = 0x30860000,
+ .virt_start = 0x30860000,
+ .size = 0x1000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO | JAILHOUSE_MEM_ROOTSHARED,
+ },
+ /* UART2 */ {
+ .phys_start = 0x30890000,
+ .virt_start = 0x30890000,
+ .size = 0x1000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO,
+ },
+ /* SHDC1 */ {
+ .phys_start = 0x30b40000,
+ .virt_start = 0x30b40000,
+ .size = 0x10000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO | JAILHOUSE_MEM_ROOTSHARED,
+ },
+ /* RAM: Top at 4GB Space */ {
+ .phys_start = 0xbff00000,
+ .virt_start = 0,
+ .size = 0x10000, /* 64KB */
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_LOADABLE,
+ },
+ /* RAM: Top at 4GB Space */ {
+ .phys_start = 0xc0000000,
+ .virt_start = 0xc0000000,
+ .size = 0x3dc00000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA |
+ JAILHOUSE_MEM_LOADABLE,
+ },
+ /* communication region */ {
+ .virt_start = 0x80000000,
+ .size = 0x00001000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_COMM_REGION,
+ },
+ },
+
+ .irqchips = {
+ /* uart2/sdhc1 */ {
+ .address = 0x38800000,
+ .pin_base = 32,
+ .pin_bitmap = {
+ (1 << (27 + 32 - 32)) | (1 << (22 + 32 - 32))
+ },
+ },
+ /* IVSHMEM */ {
+ .address = 0x38800000,
+ .pin_base = 128,
+ .pin_bitmap = {
+ 0x1 << (108 + 32 - 128) /* SPI 109 */
+ },
+ },
+ },
+
+ .pci_devices = {
+ { /* IVSHMEM 00:00.0 (demo) */
+ .type = JAILHOUSE_PCI_TYPE_IVSHMEM,
+ .domain = 1,
+ .bdf = 0 << 3,
+ .bar_mask = JAILHOUSE_IVSHMEM_BAR_MASK_INTX,
+ .shmem_regions_start = 0,
+ .shmem_dev_id = 2,
+ .shmem_peers = 3,
+ .shmem_protocol = JAILHOUSE_SHMEM_PROTO_UNDEFINED,
+ },
+ { /* IVSHMEM 00:01.0 (networking) */
+ .type = JAILHOUSE_PCI_TYPE_IVSHMEM,
+ .domain = 0,
+ .bdf = 1 << 3,
+ .bar_mask = JAILHOUSE_IVSHMEM_BAR_MASK_INTX,
+ .shmem_regions_start = 5,
+ .shmem_dev_id = 1,
+ .shmem_peers = 2,
+ .shmem_protocol = JAILHOUSE_SHMEM_PROTO_VETH,
+ },
+ },
+};
diff --git a/configs/arm64/imx8mq.c b/configs/arm64/imx8mq.c
index 7d113264..3292bd29 100644
--- a/configs/arm64/imx8mq.c
+++ b/configs/arm64/imx8mq.c
@@ -1,7 +1,7 @@
/*
* i.MX8MQ Target
*
- * Copyright 2017 NXP
+ * Copyright 2017-2018 NXP
*
* Authors:
* Peng Fan <peng...@nxp.com>
@@ -18,25 +18,31 @@
struct {
struct jailhouse_system header;
__u64 cpus[1];
- struct jailhouse_memory mem_regions[4];
+ struct jailhouse_memory mem_regions[14];
struct jailhouse_irqchip irqchips[3];
+ struct jailhouse_pci_device pci_devices[2];
} __attribute__((packed)) config = {
.header = {
.signature = JAILHOUSE_SYSTEM_SIGNATURE,
.revision = JAILHOUSE_CONFIG_REVISION,
.flags = JAILHOUSE_SYS_VIRTUAL_DEBUG_CONSOLE,
.hypervisor_memory = {
- .phys_start = 0xffc00000,
+ .phys_start = 0xfdc00000,
.size = 0x00400000,
},
.debug_console = {
.address = 0x30860000,
.size = 0x1000,
.type = JAILHOUSE_CON_TYPE_IMX,
- .flags = JAILHOUSE_CON_ACCESS_MMIO |
+ .flags = JAILHOUSE_CON_TYPE_IMX |
+ JAILHOUSE_CON_ACCESS_MMIO |
JAILHOUSE_CON_REGDIST_4,
},
.platform_info = {
+ .pci_mmconfig_base = 0xbfb00000,
+ .pci_mmconfig_end_bus = 0,
+ .pci_is_virtual = 1,
+
.arm = {
.gic_version = 3,
.gicd_base = 0x38800000,
@@ -47,9 +53,11 @@ struct {
.root_cell = {
.name = "imx8mq",

+ .num_pci_devices = ARRAY_SIZE(config.pci_devices),
.cpu_set_size = sizeof(config.cpus),
.num_memory_regions = ARRAY_SIZE(config.mem_regions),
.num_irqchips = ARRAY_SIZE(config.irqchips),
+ .vpci_irq_base = 51, /* Not include 32 base */
},
},

@@ -58,6 +66,38 @@ struct {
},

.mem_regions = {
+ /* IVHSMEM shared memory region for 00:00.0 */ {
+ .phys_start = 0xbfd00000,
+ .virt_start = 0xbfd00000,
+ .size = 0x1000,
+ .flags = JAILHOUSE_MEM_READ ,
+ },
+ {
+ .phys_start = 0xbfd01000,
+ .virt_start = 0xbfd01000,
+ .size = 0x9000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE ,
+ },
+ {
+ .phys_start = 0xbfd0a000,
+ .virt_start = 0xbfd0a000,
+ .size = 0x2000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE ,
+ },
+ {
+ .phys_start = 0xbfd0c000,
+ .virt_start = 0xbfd0c000,
+ .size = 0x2000,
+ .flags = JAILHOUSE_MEM_READ,
+ },
+ {
+ .phys_start = 0xbfd0e000,
+ .virt_start = 0xbfd0e000,
+ .size = 0x2000,
+ .flags = JAILHOUSE_MEM_READ,
+ },
+ /* IVSHMEM shared memory regions for 00:01.0 (networking) */
+ JAILHOUSE_SHMEM_NET_REGIONS(0xbfe00000, 0),
/* MMIO (permissive) */ {
.phys_start = 0x00000000,
.virt_start = 0x00000000,
@@ -68,14 +108,28 @@ struct {
/* RAM */ {
.phys_start = 0x40000000,
.virt_start = 0x40000000,
- .size = 0xbfb00000,
+ .size = 0x7fb00000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE,
},
- /* IVSHMEM shared memory region for 00:00.0 */ {
- .phys_start = 0xffb00000,
- .virt_start = 0xffb00000,
+ /* Linux Loader */{
+ .phys_start = 0xbff00000,
+ .virt_start = 0xbff00000,
.size = 0x100000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_EXECUTE,
+ },
+ /* Inmate memory */{
+ .phys_start = 0xc0000000,
+ .virt_start = 0xc0000000,
+ .size = 0x3dc00000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_EXECUTE,
+ },
+ /* OP-TEE reserved memory */{
+ .phys_start = 0xfe000000,
+ .virt_start = 0xfe000000,
+ .size = 0x2000000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
},
@@ -103,4 +157,27 @@ struct {
},
},
},
+
+ .pci_devices = {
+ { /* IVSHMEM 0000:00:00.0 (demo) */
+ .type = JAILHOUSE_PCI_TYPE_IVSHMEM,
+ .domain = 0,
+ .bdf = 0 << 3,
+ .bar_mask = JAILHOUSE_IVSHMEM_BAR_MASK_INTX,
+ .shmem_regions_start = 0,
+ .shmem_dev_id = 0,
+ .shmem_peers = 3,
+ .shmem_protocol = JAILHOUSE_SHMEM_PROTO_UNDEFINED,
+ },
+ { /* IVSHMEM 0000:00:01.0 (networking) */
+ .type = JAILHOUSE_PCI_TYPE_IVSHMEM,
+ .domain = 0,
+ .bdf = 1 << 3,
+ .bar_mask = JAILHOUSE_IVSHMEM_BAR_MASK_INTX,
+ .shmem_regions_start = 5,
+ .shmem_dev_id = 0,
+ .shmem_peers = 2,
+ .shmem_protocol = JAILHOUSE_SHMEM_PROTO_VETH,
+ },
+ },
};
--
2.17.1

Alice Guo

unread,
Mar 23, 2020, 5:44:00 AM3/23/20
to jailho...@googlegroups.com, peng...@nxp.com, Alice Guo
Signed-off-by: Alice Guo <alic...@nxp.com>
---
configs/arm64/imx8mm-inmate-demo.c | 66 +++++++++
configs/arm64/imx8mm-ivshmem-demo.c | 126 +++++++++++++++++
configs/arm64/imx8mm-linux-demo.c | 165 ++++++++++++++++++++++
configs/arm64/imx8mm.c | 203 ++++++++++++++++++++++++++++
4 files changed, 560 insertions(+)
create mode 100644 configs/arm64/imx8mm-inmate-demo.c
create mode 100644 configs/arm64/imx8mm-ivshmem-demo.c
create mode 100644 configs/arm64/imx8mm-linux-demo.c
create mode 100644 configs/arm64/imx8mm.c

diff --git a/configs/arm64/imx8mm-inmate-demo.c b/configs/arm64/imx8mm-inmate-demo.c
new file mode 100644
index 00000000..6e672901
--- /dev/null
+++ b/configs/arm64/imx8mm-inmate-demo.c
@@ -0,0 +1,66 @@
+/*
+ * iMX8MM target - gic-demo
+ *
+ * Copyright 2018-2019 NXP
+ *
+ * Authors:
+ * Peng Fan <peng...@nxp.com>
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2. See
+ * the COPYING file in the top-level directory.
+ */
+
+#include <jailhouse/types.h>
+#include <jailhouse/cell-config.h>
+
+struct {
+ struct jailhouse_cell_desc cell;
+ __u64 cpus[1];
+ struct jailhouse_memory mem_regions[3];
+} __attribute__((packed)) config = {
+ .cell = {
+ .signature = JAILHOUSE_CELL_DESC_SIGNATURE,
+ .revision = JAILHOUSE_CONFIG_REVISION,
+ .name = "inmate-demo",
+ .flags = JAILHOUSE_CELL_PASSIVE_COMMREG,
+
+ .cpu_set_size = sizeof(config.cpus),
+ .num_memory_regions = ARRAY_SIZE(config.mem_regions),
+ .num_irqchips = 0,
+ .num_pci_devices = 0,
+
+ .console = {
+ .address = 0x30890000,
+ .type = JAILHOUSE_CON_TYPE_IMX,
+ .flags = JAILHOUSE_CON_ACCESS_MMIO |
+ JAILHOUSE_CON_REGDIST_4,
+ },
+ },
+
+ .cpus = {
+ 0x8,
+ },
+
+ .mem_regions = {
+ /* UART2 */ {
+ .phys_start = 0x30890000,
+ .virt_start = 0x30890000,
+ .size = 0x1000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO | JAILHOUSE_MEM_ROOTSHARED,
+ },
+ /* RAM: start from the bottom of inmate memory */ {
+ .phys_start = 0xb3c00000,
+ .virt_start = 0,
+ .size = 0x00010000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_LOADABLE,
+ },
+ /* communication region */ {
+ .virt_start = 0x80000000,
+ .size = 0x00001000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_COMM_REGION,
+ },
+ }
+};
diff --git a/configs/arm64/imx8mm-ivshmem-demo.c b/configs/arm64/imx8mm-ivshmem-demo.c
new file mode 100644
index 00000000..073c034b
--- /dev/null
+++ b/configs/arm64/imx8mm-ivshmem-demo.c
@@ -0,0 +1,126 @@
+/*
+ * iMX8MM target - ivshmem-demo
+ *
+ * Copyright 2018 NXP
+ *
+ * Authors:
+ * Peng Fan <peng...@nxp.com>
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2. See
+ * the COPYING file in the top-level directory.
+ */
+
+#include <jailhouse/types.h>
+#include <jailhouse/cell-config.h>
+
+struct {
+ struct jailhouse_cell_desc cell;
+ __u64 cpus[1];
+ struct jailhouse_memory mem_regions[8];
+ struct jailhouse_irqchip irqchips[1];
+ struct jailhouse_pci_device pci_devices[1];
+} __attribute__((packed)) config = {
+ .cell = {
+ .signature = JAILHOUSE_CELL_DESC_SIGNATURE,
+ .revision = JAILHOUSE_CONFIG_REVISION,
+ .name = "ivshmem-demo",
+ .flags = JAILHOUSE_CELL_PASSIVE_COMMREG,
+
+ .cpu_set_size = sizeof(config.cpus),
+ .num_memory_regions = ARRAY_SIZE(config.mem_regions),
+ .num_irqchips = ARRAY_SIZE(config.irqchips),
+ .num_pci_devices = ARRAY_SIZE(config.pci_devices),
+ /* IVSHMEM_IRQ - 32 */
+ .vpci_irq_base = 76, /* Not include 32 base */
+
+ .console = {
+ .address = 0x30890000,
+ .type = JAILHOUSE_CON_TYPE_IMX,
+ .flags = JAILHOUSE_CON_ACCESS_MMIO |
+ JAILHOUSE_CON_REGDIST_4,
+ },
+ },
+
+ .cpus = {
+ 0x8,
+ },
+
+ .mem_regions = {
+ /* IVSHMEM shared memory regions (demo) */
+ {
+ .phys_start = 0xbba00000,
+ .virt_start = 0xbba00000,
+ .size = 0x1000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_ROOTSHARED,
+ },
+ {
+ .phys_start = 0xbba01000,
+ .virt_start = 0xbba01000,
+ .size = 0x9000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_ROOTSHARED,
+ },
+ {
+ .phys_start = 0xbba0a000,
+ .virt_start = 0xbba0a000,
+ .size = 0x2000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_ROOTSHARED,
+ },
+ {
+ .phys_start = 0xbba0c000,
+ .virt_start = 0xbba0c000,
+ .size = 0x2000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_ROOTSHARED,
+ },
+ {
+ .phys_start = 0xbba0e000,
+ .virt_start = 0xbba0e000,
+ .size = 0x2000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_ROOTSHARED,
+ },
+ /* UART2 */ {
+ .phys_start = 0x30890000,
+ .virt_start = 0x30890000,
+ .size = 0x1000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO | JAILHOUSE_MEM_ROOTSHARED,
+ },
+ /* RAM: start from the bottom of inmate memory */ {
+ .phys_start = 0xb3c00000,
+ .virt_start = 0,
+ .size = 0x00010000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_LOADABLE,
+ },
+ /* communication region */ {
+ .virt_start = 0x80000000,
+ .size = 0x00001000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_COMM_REGION,
+ },
+ },
+
+ .irqchips = {
+ /* GIC */ {
+ .address = 0x38800000,
+ .pin_base = 96,
+ .pin_bitmap = {
+ 0x1 << (76 + 32 - 96) /* SPI 76 */
+ },
+ },
+ },
+
+ .pci_devices = {
+ { /* IVSHMEM 00:00.0 (demo) */
+ .type = JAILHOUSE_PCI_TYPE_IVSHMEM,
+ .domain = 1,
+ .bdf = 0 << 3,
+ .bar_mask = JAILHOUSE_IVSHMEM_BAR_MASK_INTX,
+ .shmem_regions_start = 0,
+ .shmem_dev_id = 1,
+ .shmem_peers = 1,
+ .shmem_protocol = JAILHOUSE_SHMEM_PROTO_UNDEFINED,
+ },
+ },
+};
diff --git a/configs/arm64/imx8mm-linux-demo.c b/configs/arm64/imx8mm-linux-demo.c
new file mode 100644
index 00000000..2024ca79
--- /dev/null
+++ b/configs/arm64/imx8mm-linux-demo.c
@@ -0,0 +1,165 @@
+/*
+ * iMX8MM target - linux-demo
+ *
+ * Copyright 2019 NXP
+ *
+ * Authors:
+ * Peng Fan <peng...@nxp.com>
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2. See
+ * the COPYING file in the top-level directory.
+ */
+
+/*
+ * Boot 2nd Linux cmdline:
+ * export PATH=$PATH:/usr/share/jailhouse/tools/
+ * jailhouse cell linux imx8mm-linux-demo.cell Image -d fsl-imx8mm-evk-inmate.dtb -c "clk_ignore_unused console=ttymxc3,115200 earlycon=ec_imx6q,0x30890000,115200 root=/dev/mmcblk2p2 rootwait rw"
+ */
+#include <jailhouse/types.h>
+#include <jailhouse/cell-config.h>
+
+struct {
+ struct jailhouse_cell_desc cell;
+ __u64 cpus[1];
+ struct jailhouse_memory mem_regions[15];
+ struct jailhouse_irqchip irqchips[2];
+ struct jailhouse_pci_device pci_devices[2];
+} __attribute__((packed)) config = {
+ .cell = {
+ .signature = JAILHOUSE_CELL_DESC_SIGNATURE,
+ .revision = JAILHOUSE_CONFIG_REVISION,
+ .name = "linux-inmate-demo",
+ .flags = JAILHOUSE_CELL_PASSIVE_COMMREG,
+
+ .cpu_set_size = sizeof(config.cpus),
+ .num_memory_regions = ARRAY_SIZE(config.mem_regions),
+ .num_irqchips = ARRAY_SIZE(config.irqchips),
+ .num_pci_devices = ARRAY_SIZE(config.pci_devices),
+ .vpci_irq_base = 74, /* Not include 32 base */
+ },
+
+ .cpus = {
+ 0xc,
+ },
+
+ .mem_regions = {
+ /* IVHSMEM shared memory region for 00:00.0 */ {
+ .phys_start = 0xbba00000,
+ .virt_start = 0xbba00000,
+ .size = 0x1000,
+ .flags = JAILHOUSE_MEM_READ ,
+ },
+ {
+ .phys_start = 0xbba01000,
+ .virt_start = 0xbba01000,
+ .size = 0x9000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE ,
+ },
+ {
+ .phys_start = 0xbba0a000,
+ .virt_start = 0xbba0a000,
+ .size = 0x2000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE ,
+ },
+ {
+ .phys_start = 0xbba0c000,
+ .virt_start = 0xbba0c000,
+ .size = 0x2000,
+ .flags = JAILHOUSE_MEM_READ,
+ },
+ {
+ .phys_start = 0xbba0e000,
+ .virt_start = 0xbba0e000,
+ .size = 0x2000,
+ .flags = JAILHOUSE_MEM_READ,
+ },
+ /* IVSHMEM shared memory regions for 00:01.0 (networking) */
+ JAILHOUSE_SHMEM_NET_REGIONS(0xbbb00000, 0),
+ /* UART2 earlycon */ {
+ .phys_start = 0x30890000,
+ .virt_start = 0x30890000,
+ .size = 0x1000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO | JAILHOUSE_MEM_ROOTSHARED,
+ },
+ /* UART4 */ {
+ .phys_start = 0x30a60000,
+ .virt_start = 0x30a60000,
+ .size = 0x1000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO,
+ },
+ /* SHDC1 */ {
+ .phys_start = 0x30b60000,
+ .virt_start = 0x30b60000,
+ .size = 0x10000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO,
+ },
+ /* RAM: Top at 4GB Space */ {
+ .phys_start = 0xbb700000,
+ .virt_start = 0,
+ .size = 0x10000, /* 64KB */
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_LOADABLE,
+ },
+ /* RAM */ {
+ /*
+ * We could not use 0x80000000 which conflicts with
+ * COMM_REGION_BASE
+ */
+ .phys_start = 0x93c00000,
+ .virt_start = 0x93c00000,
+ .size = 0x24000000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA |
+ JAILHOUSE_MEM_LOADABLE,
+ },
+ /* communication region */ {
+ .virt_start = 0x80000000,
+ .size = 0x00001000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_COMM_REGION,
+ },
+ },
+
+ .irqchips = {
+ /* uart2/sdhc1 */ {
+ .address = 0x38800000,
+ .pin_base = 32,
+ .pin_bitmap = {
+ (1 << (24 + 32 - 32)) | (1 << (29 + 32 - 32))
+ },
+ },
+ /* IVSHMEM */ {
+ .address = 0x38800000,
+ .pin_base = 96,
+ .pin_bitmap = {
+ 0xf << (74 + 32 - 96)
diff --git a/configs/arm64/imx8mm.c b/configs/arm64/imx8mm.c
new file mode 100644
index 00000000..f6e96595
--- /dev/null
+++ b/configs/arm64/imx8mm.c
@@ -0,0 +1,203 @@
+/*
+ * i.MX8MM Target
+ *
+ * Copyright 2018 NXP
+ *
+ * Authors:
+ * Peng Fan <peng...@nxp.com>
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2. See
+ * the COPYING file in the top-level directory.
+ *
+ * Reservation via device tree: reg = <0x0 0xffaf0000 0x0 0x510000>
+ */
+
+#include <jailhouse/types.h>
+#include <jailhouse/cell-config.h>
+
+struct {
+ struct jailhouse_system header;
+ __u64 cpus[1];
+ struct jailhouse_memory mem_regions[16];
+ struct jailhouse_irqchip irqchips[3];
+ struct jailhouse_pci_device pci_devices[2];
+} __attribute__((packed)) config = {
+ .header = {
+ .signature = JAILHOUSE_SYSTEM_SIGNATURE,
+ .revision = JAILHOUSE_CONFIG_REVISION,
+ .flags = JAILHOUSE_SYS_VIRTUAL_DEBUG_CONSOLE,
+ .hypervisor_memory = {
+ .phys_start = 0xb7c00000,
+ .size = 0x00400000,
+ },
+ .debug_console = {
+ .address = 0x30890000,
+ .size = 0x1000,
+ .flags = JAILHOUSE_CON_TYPE_IMX |
+ JAILHOUSE_CON_ACCESS_MMIO |
+ JAILHOUSE_CON_REGDIST_4,
+ .type = JAILHOUSE_CON_TYPE_IMX,
+ },
+ .platform_info = {
+ /*
+ * .pci_mmconfig_base is fixed; if you change it,
+ * update the value in mach.h
+ * (PCI_CFG_BASE) and regenerate the inmate library
+ */
+ .pci_mmconfig_base = 0xbb800000,
+ .pci_mmconfig_end_bus = 0,
+ .pci_is_virtual = 1,
+ .pci_domain = 0,
+
+ .arm = {
+ .gic_version = 3,
+ .gicd_base = 0x38800000,
+ .gicr_base = 0x38880000,
+ .maintenance_irq = 25,
+ },
+ },
+ .root_cell = {
+ .name = "imx8mm",
+
+ .num_pci_devices = ARRAY_SIZE(config.pci_devices),
+ .cpu_set_size = sizeof(config.cpus),
+ .num_memory_regions = ARRAY_SIZE(config.mem_regions),
+ .num_irqchips = ARRAY_SIZE(config.irqchips),
+ .vpci_irq_base = 51, /* Not include 32 base */
+ },
+ },
+
+ .cpus = {
+ 0xf,
+ },
+
+ .mem_regions = {
+ /* IVHSMEM shared memory region for 00:00.0 */ {
+ .phys_start = 0xbba00000,
+ .virt_start = 0xbba00000,
+ .size = 0x1000,
+ .flags = JAILHOUSE_MEM_READ ,
+ },
+ {
+ .phys_start = 0xbba01000,
+ .virt_start = 0xbba01000,
+ .size = 0x9000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE ,
+ },
+ {
+ .phys_start = 0xbba0a000,
+ .virt_start = 0xbba0a000,
+ .size = 0x2000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE ,
+ },
+ {
+ .phys_start = 0xbba0c000,
+ .virt_start = 0xbba0c000,
+ .size = 0x2000,
+ .flags = JAILHOUSE_MEM_READ,
+ },
+ {
+ .phys_start = 0xbba0e000,
+ .virt_start = 0xbba0e000,
+ .size = 0x2000,
+ .flags = JAILHOUSE_MEM_READ,
+ },
+ /* IVSHMEM shared memory regions for 00:01.0 (networking) */
+ JAILHOUSE_SHMEM_NET_REGIONS(0xbbb00000, 0),
+ /* IO */ {
+ .phys_start = 0x00000000,
+ .virt_start = 0x00000000,
+ .size = 0x40000000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO,
+ },
+ /* RAM 00*/ {
+ .phys_start = 0x40000000,
+ .virt_start = 0x40000000,
+ .size = 0x73c00000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_EXECUTE,
+ },
+ /* Inmate memory */{
+ .phys_start = 0xb3c00000,
+ .virt_start = 0xb3c00000,
+ .size = 0x04000000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_EXECUTE,
+ },
+ /* RAM 01 */ {
+ .phys_start = 0xb8000000,
+ .virt_start = 0xb8000000,
+ .size = 0x03700000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_EXECUTE,
+ },
+ /* Loader */{
+ .phys_start = 0xbb700000,
+ .virt_start = 0xbb700000,
+ .size = 0x100000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_EXECUTE,
+ },
+ /* RAM 02 */ {
+ .phys_start = 0xbbc00000,
+ .virt_start = 0xbbc00000,
+ .size = 0x02400000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_EXECUTE,
+ },
+ /* OP-TEE reserved memory */{
+ .phys_start = 0xbe000000,
+ .virt_start = 0xbe000000,
+ .size = 0x2000000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
+ },
+ },
+
+ .irqchips = {
+ /* GIC */ {
+ .address = 0x38800000,
+ .pin_base = 32,
+ .pin_bitmap = {
+ 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
+ },
+ },
+ /* GIC */ {
+ .address = 0x38800000,
+ .pin_base = 160,
+ .pin_bitmap = {
+ 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
+ },
+ },
+ /* GIC */ {
+ .address = 0x38800000,
+ .pin_base = 288,
+ .pin_bitmap = {
+ 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
+ },
+ },
+ },
+
+ .pci_devices = {
+ { /* IVSHMEM 0000:00:00.0 (demo) */
+ .type = JAILHOUSE_PCI_TYPE_IVSHMEM,
+ .domain = 0,
+ .bdf = 0 << 3,
+ .bar_mask = JAILHOUSE_IVSHMEM_BAR_MASK_INTX,
+ .shmem_regions_start = 0,
+ .shmem_dev_id = 0,
+ .shmem_peers = 3,
+ .shmem_protocol = JAILHOUSE_SHMEM_PROTO_UNDEFINED,
+ },
+ { /* IVSHMEM 0000:00:01.0 (networking) */
+ .type = JAILHOUSE_PCI_TYPE_IVSHMEM,
+ .domain = 0,
+ .bdf = 1 << 3,
+ .bar_mask = JAILHOUSE_IVSHMEM_BAR_MASK_INTX,
+ .shmem_regions_start = 5,
+ .shmem_dev_id = 0,
+ .shmem_peers = 2,
+ .shmem_protocol = JAILHOUSE_SHMEM_PROTO_VETH,
+ },
+ },
+};
--
2.17.1

Jan Kiszka

unread,
Mar 23, 2020, 7:17:54 AM3/23/20
to Alice Guo, jailho...@googlegroups.com, peng...@nxp.com
On 24.03.20 17:43, Alice Guo wrote:
^^^^^^^^^^^^^^

Someone is time-traveling here - will life be better in the future? ;)

> Signed-off-by: Alice Guo <alic...@nxp.com>
> ---
> configs/arm64/imx8mq-inmate-demo.c | 4 +-
> configs/arm64/imx8mq-ivshmem-demo.c | 124 ++++++++++++++++++++++

Why do we need a separate config for ivshmem? Can't you fold that into
inmate-demo.c, like we do in the other targets?

This also applies to the second patch.

Jan
Siemens AG, Corporate Technology, CT RDA IOT SES-DE
Corporate Competence Center Embedded Linux

Alice Guo

unread,
Mar 25, 2020, 2:20:40 AM3/25/20
to jailho...@googlegroups.com, peng...@nxp.com, Alice Guo
Signed-off-by: Alice Guo <alic...@nxp.com>
---
configs/arm64/imx8mq-inmate-demo.c | 70 +++++++++++--
configs/arm64/imx8mq-linux-demo.c | 158 +++++++++++++++++++++++++++++
configs/arm64/imx8mq.c | 93 +++++++++++++++--
3 files changed, 307 insertions(+), 14 deletions(-)
create mode 100644 configs/arm64/imx8mq-linux-demo.c

diff --git a/configs/arm64/imx8mq-inmate-demo.c b/configs/arm64/imx8mq-inmate-demo.c
index 8c1ad624..d3c89aec 100644
--- a/configs/arm64/imx8mq-inmate-demo.c
+++ b/configs/arm64/imx8mq-inmate-demo.c
@@ -1,7 +1,7 @@
/*
* iMX8MQ target - inmate demo
*
- * Copyright NXP 2018
+ * Copyright 2018-2019 NXP
*
* Authors:
* Peng Fan <peng...@nxp.com>
@@ -16,7 +16,9 @@
struct {
struct jailhouse_cell_desc cell;
__u64 cpus[1];
- struct jailhouse_memory mem_regions[3];
+ struct jailhouse_memory mem_regions[8];
+ struct jailhouse_irqchip irqchips[1];
+ struct jailhouse_pci_device pci_devices[1];
} __attribute__((packed)) config = {
.cell = {
.signature = JAILHOUSE_CELL_DESC_SIGNATURE,
@@ -26,8 +28,9 @@ struct {

.cpu_set_size = sizeof(config.cpus),
.num_memory_regions = ARRAY_SIZE(config.mem_regions),
- .num_irqchips = 0,
- .num_pci_devices = 0,
+ .num_irqchips = ARRAY_SIZE(config.irqchips),
+ .num_pci_devices = ARRAY_SIZE(config.pci_devices),
+ .vpci_irq_base = 108,

.console = {
.address = 0x30860000,
@@ -42,6 +45,38 @@ struct {
},

.mem_regions = {
+ /* IVHSMEM shared memory region for 00:00.0 */ {
+ .phys_start = 0xbfd00000,
+ .virt_start = 0xbfd00000,
+ .size = 0x1000,
/* UART1 */ {
.phys_start = 0x30860000,
.virt_start = 0x30860000,
@@ -50,7 +85,7 @@ struct {
JAILHOUSE_MEM_IO | JAILHOUSE_MEM_ROOTSHARED,
},
/* RAM: Top at 4GB Space */ {
- .phys_start = 0xffaf0000,
+ .phys_start = 0xc0000000,
.virt_start = 0,
.size = 0x00010000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
@@ -62,5 +97,28 @@ struct {
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_COMM_REGION,
},
- }
+ },
+
+ .irqchips = {
+ /* GIC */ {
+ .address = 0x38800000,
+ .pin_base = 128,
+ .pin_bitmap = {
+ 0x1 << (108 + 32 - 128) /* SPI 109 */
+ },
+ },
+ },
+
+ .pci_devices = {
+ { /* IVSHMEM 00:00.0 (demo) */
+ .type = JAILHOUSE_PCI_TYPE_IVSHMEM,
+ .domain = 1,
+ .bdf = 0 << 3,
+ .bar_mask = JAILHOUSE_IVSHMEM_BAR_MASK_INTX,
+ .shmem_regions_start = 0,
+ .shmem_dev_id = 1,
+ .shmem_peers = 1,
+ .shmem_protocol = JAILHOUSE_SHMEM_PROTO_UNDEFINED,
+ },
+ },
2.17.1

Alice Guo

unread,
Mar 25, 2020, 2:20:44 AM3/25/20
to jailho...@googlegroups.com, peng...@nxp.com, Alice Guo
Signed-off-by: Alice Guo <alic...@nxp.com>
---
configs/arm64/imx8mm-inmate-demo.c | 125 ++++++++++++++++++
configs/arm64/imx8mm-linux-demo.c | 165 +++++++++++++++++++++++
configs/arm64/imx8mm.c | 203 +++++++++++++++++++++++++++++
3 files changed, 493 insertions(+)
create mode 100644 configs/arm64/imx8mm-inmate-demo.c
create mode 100644 configs/arm64/imx8mm-linux-demo.c
create mode 100644 configs/arm64/imx8mm.c

diff --git a/configs/arm64/imx8mm-inmate-demo.c b/configs/arm64/imx8mm-inmate-demo.c
new file mode 100644
index 00000000..5e61d41e
--- /dev/null
+++ b/configs/arm64/imx8mm-inmate-demo.c
@@ -0,0 +1,125 @@
+/*
+ * iMX8MM target - gic-demo
+ *
+ * Copyright 2018-2019 NXP
+ *
+ * Authors:
+ * Peng Fan <peng...@nxp.com>
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2. See
+ * the COPYING file in the top-level directory.
+ */
+
+#include <jailhouse/types.h>
+#include <jailhouse/cell-config.h>
+
+struct {
+ struct jailhouse_cell_desc cell;
+ __u64 cpus[1];
+ struct jailhouse_memory mem_regions[8];
+ struct jailhouse_irqchip irqchips[1];
+ struct jailhouse_pci_device pci_devices[1];
+} __attribute__((packed)) config = {
+ .cell = {
+ .signature = JAILHOUSE_CELL_DESC_SIGNATURE,
+ .revision = JAILHOUSE_CONFIG_REVISION,
+ .name = "inmate-demo",
+ .flags = JAILHOUSE_CELL_PASSIVE_COMMREG,
+
+ .cpu_set_size = sizeof(config.cpus),
+ .num_memory_regions = ARRAY_SIZE(config.mem_regions),
+ .num_irqchips = ARRAY_SIZE(config.irqchips),
+ .num_pci_devices = ARRAY_SIZE(config.pci_devices),
+ .vpci_irq_base = 76,
+
+ .console = {
+ .address = 0x30890000,
+ .type = JAILHOUSE_CON_TYPE_IMX,
+ .flags = JAILHOUSE_CON_ACCESS_MMIO |
+ JAILHOUSE_CON_REGDIST_4,
+ },
+ },
+
+ .cpus = {
+ 0x8,
+ },
+
+ .mem_regions = {
+ /* IVSHMEM shared memory regions (demo) */
+ {
+ .phys_start = 0xbba00000,
+ .virt_start = 0xbba00000,
+ .size = 0x1000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_ROOTSHARED,
+ },
+ {
+ .phys_start = 0xbba01000,
+ .virt_start = 0xbba01000,
+ .size = 0x9000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_ROOTSHARED,
+ },
+ {
+ .phys_start = 0xbba0a000,
+ .virt_start = 0xbba0a000,
+ .size = 0x2000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_ROOTSHARED,
+ },
+ {
+ .phys_start = 0xbba0c000,
+ .virt_start = 0xbba0c000,
+ .size = 0x2000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_ROOTSHARED,
+ },
+ {
+ .phys_start = 0xbba0e000,
+ .virt_start = 0xbba0e000,
+ .size = 0x2000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_ROOTSHARED,
+ },
+ /* UART2 */ {
+ .phys_start = 0x30890000,
+ .virt_start = 0x30890000,
+ .size = 0x1000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO | JAILHOUSE_MEM_ROOTSHARED,
+ },
+ /* RAM: start from the bottom of inmate memory */ {
+ .phys_start = 0xb3c00000,
+ .virt_start = 0,
+ .size = 0x00010000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_LOADABLE,
+ },
+ /* communication region */ {
+ .virt_start = 0x80000000,
+ .size = 0x00001000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_COMM_REGION,
+ },
+ },
+
+ .irqchips = {
+ /* GIC */ {
+ .address = 0x38800000,
+ .pin_base = 96,
+ .pin_bitmap = {
+ 0x1 << (76 + 32 - 96) /* SPI 76 */
+ },
+ },
+ },
+
+ .pci_devices = {
+ { /* IVSHMEM 00:00.0 (demo) */
+ .type = JAILHOUSE_PCI_TYPE_IVSHMEM,
+ .domain = 1,
+ .bdf = 0 << 3,
+ .bar_mask = JAILHOUSE_IVSHMEM_BAR_MASK_INTX,
+ .shmem_regions_start = 0,
+ .shmem_dev_id = 1,
+ .shmem_peers = 1,
+ .shmem_protocol = JAILHOUSE_SHMEM_PROTO_UNDEFINED,
+ },
+ },
+};
diff --git a/configs/arm64/imx8mm-linux-demo.c b/configs/arm64/imx8mm-linux-demo.c
new file mode 100644
index 00000000..2024ca79
--- /dev/null
+++ b/configs/arm64/imx8mm-linux-demo.c
@@ -0,0 +1,165 @@
+/*
+ * iMX8MM target - linux-demo
+ *
+ * Copyright 2019 NXP
+ *
+ * Authors:
+ * Peng Fan <peng...@nxp.com>
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2. See
+ * the COPYING file in the top-level directory.
+ */
+
+/*
+ * Boot 2nd Linux cmdline:
+ * export PATH=$PATH:/usr/share/jailhouse/tools/
+ * jailhouse cell linux imx8mm-linux-demo.cell Image -d fsl-imx8mm-evk-inmate.dtb -c "clk_ignore_unused console=ttymxc3,115200 earlycon=ec_imx6q,0x30890000,115200 root=/dev/mmcblk2p2 rootwait rw"
+ */
+#include <jailhouse/types.h>
+#include <jailhouse/cell-config.h>
+
+struct {
+ struct jailhouse_cell_desc cell;
+ __u64 cpus[1];
+ struct jailhouse_memory mem_regions[15];
+ struct jailhouse_irqchip irqchips[2];
+ struct jailhouse_pci_device pci_devices[2];
+} __attribute__((packed)) config = {
+ .cell = {
+ .signature = JAILHOUSE_CELL_DESC_SIGNATURE,
+ .revision = JAILHOUSE_CONFIG_REVISION,
+ .name = "linux-inmate-demo",
+ .flags = JAILHOUSE_CELL_PASSIVE_COMMREG,
+
+ .cpu_set_size = sizeof(config.cpus),
+ .num_memory_regions = ARRAY_SIZE(config.mem_regions),
+ .num_irqchips = ARRAY_SIZE(config.irqchips),
+ .num_pci_devices = ARRAY_SIZE(config.pci_devices),
+ .vpci_irq_base = 74, /* Not include 32 base */
+ },
+
+ .cpus = {
+ 0xc,
+ },
+
+ .mem_regions = {
+ /* IVHSMEM shared memory region for 00:00.0 */ {
+ .phys_start = 0xbba00000,
+ .virt_start = 0xbba00000,
+ .size = 0x1000,
+ .flags = JAILHOUSE_MEM_READ ,
+ },
+ {
+ .phys_start = 0xbba01000,
+ .virt_start = 0xbba01000,
+ .size = 0x9000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE ,
+ },
+ {
+ .phys_start = 0xbba0a000,
+ .virt_start = 0xbba0a000,
+ .size = 0x2000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE ,
+ },
+ {
+ .phys_start = 0xbba0c000,
+ .virt_start = 0xbba0c000,
+ .size = 0x2000,
+ .flags = JAILHOUSE_MEM_READ,
+ },
+ {
+ .phys_start = 0xbba0e000,
+ .virt_start = 0xbba0e000,
+ .size = 0x2000,
+ .flags = JAILHOUSE_MEM_READ,
+ },
+ /* IVSHMEM shared memory regions for 00:01.0 (networking) */
+ JAILHOUSE_SHMEM_NET_REGIONS(0xbbb00000, 0),
+ /* UART2 earlycon */ {
+ .phys_start = 0x30890000,
+ .virt_start = 0x30890000,
+ .size = 0x1000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO | JAILHOUSE_MEM_ROOTSHARED,
+ },
+ /* UART4 */ {
+ .phys_start = 0x30a60000,
+ .virt_start = 0x30a60000,
+ .size = 0x1000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO,
+ },
+ /* SHDC1 */ {
+ .phys_start = 0x30b60000,
+ .virt_start = 0x30b60000,
+ .size = 0x10000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO,
+ },
+ /* RAM: Top at 4GB Space */ {
+ .phys_start = 0xbb700000,
+ .virt_start = 0,
+ .size = 0x10000, /* 64KB */
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_LOADABLE,
+ },
+ /* RAM */ {
+ /*
+ * We could not use 0x80000000 which conflicts with
+ * COMM_REGION_BASE
+ */
+ .phys_start = 0x93c00000,
+ .virt_start = 0x93c00000,
+ .size = 0x24000000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA |
+ JAILHOUSE_MEM_LOADABLE,
+ },
+ /* communication region */ {
+ .virt_start = 0x80000000,
+ .size = 0x00001000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_COMM_REGION,
+ },
+ },
+
+ .irqchips = {
+ /* uart2/sdhc1 */ {
+ .address = 0x38800000,
+ .pin_base = 32,
+ .pin_bitmap = {
+ (1 << (24 + 32 - 32)) | (1 << (29 + 32 - 32))
+ },
+ },
+ /* IVSHMEM */ {
+ .address = 0x38800000,
+ .pin_base = 96,
+ .pin_bitmap = {
+ 0xf << (74 + 32 - 96)
diff --git a/configs/arm64/imx8mm.c b/configs/arm64/imx8mm.c
new file mode 100644
index 00000000..f6e96595
--- /dev/null
+++ b/configs/arm64/imx8mm.c
@@ -0,0 +1,203 @@
+/*
+ * i.MX8MM Target
+ *
+ * Copyright 2018 NXP
+ *
+ * Authors:
+ * Peng Fan <peng...@nxp.com>
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2. See
+ * the COPYING file in the top-level directory.
+ *
+ * Reservation via device tree: reg = <0x0 0xffaf0000 0x0 0x510000>
+ */
+
+#include <jailhouse/types.h>
+#include <jailhouse/cell-config.h>
+
+struct {
+ struct jailhouse_system header;
+ __u64 cpus[1];
+ struct jailhouse_memory mem_regions[16];
+ struct jailhouse_irqchip irqchips[3];
+ struct jailhouse_pci_device pci_devices[2];
+} __attribute__((packed)) config = {
+ .header = {
+ .signature = JAILHOUSE_SYSTEM_SIGNATURE,
+ .revision = JAILHOUSE_CONFIG_REVISION,
+ .flags = JAILHOUSE_SYS_VIRTUAL_DEBUG_CONSOLE,
+ .hypervisor_memory = {
+ .phys_start = 0xb7c00000,
+ .size = 0x00400000,
+ },
+ .debug_console = {
+ .address = 0x30890000,
+ .size = 0x1000,
+ .flags = JAILHOUSE_CON_TYPE_IMX |
+ JAILHOUSE_CON_ACCESS_MMIO |
+ JAILHOUSE_CON_REGDIST_4,
+ .type = JAILHOUSE_CON_TYPE_IMX,
+ },
+ .platform_info = {
+ /*
+ * .pci_mmconfig_base is fixed; if you change it,
+ * update the value in mach.h
+ * (PCI_CFG_BASE) and regenerate the inmate library
+ */
+ .pci_mmconfig_base = 0xbb800000,
+ .pci_mmconfig_end_bus = 0,
+ .pci_is_virtual = 1,
+ .pci_domain = 0,
+
+ .arm = {
+ .gic_version = 3,
+ .gicd_base = 0x38800000,
+ .gicr_base = 0x38880000,
+ .maintenance_irq = 25,
+ },
+ },
+ .root_cell = {
+ .name = "imx8mm",
+
+ .num_pci_devices = ARRAY_SIZE(config.pci_devices),
+ .cpu_set_size = sizeof(config.cpus),
+ .num_memory_regions = ARRAY_SIZE(config.mem_regions),
+ .num_irqchips = ARRAY_SIZE(config.irqchips),
+ .vpci_irq_base = 51, /* Not include 32 base */
+ },
+ },
+
+ .cpus = {
+ 0xf,
+ },
+
+ .mem_regions = {
+ /* IVHSMEM shared memory region for 00:00.0 */ {
+ .phys_start = 0xbba00000,
+ .virt_start = 0xbba00000,
+ .size = 0x1000,
+ .flags = JAILHOUSE_MEM_READ ,
+ },
+ {
+ .phys_start = 0xbba01000,
+ .virt_start = 0xbba01000,
+ .size = 0x9000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE ,
+ },
+ {
+ .phys_start = 0xbba0a000,
+ .virt_start = 0xbba0a000,
+ .size = 0x2000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE ,
+ },
+ {
+ .phys_start = 0xbba0c000,
+ .virt_start = 0xbba0c000,
+ .size = 0x2000,
+ .flags = JAILHOUSE_MEM_READ,
+ },
+ {
+ .phys_start = 0xbba0e000,
+ .virt_start = 0xbba0e000,
+ .size = 0x2000,
+ .flags = JAILHOUSE_MEM_READ,
+ },
+ /* IVSHMEM shared memory regions for 00:01.0 (networking) */
+ JAILHOUSE_SHMEM_NET_REGIONS(0xbbb00000, 0),
+ /* IO */ {
+ .phys_start = 0x00000000,
+ .virt_start = 0x00000000,
+ .size = 0x40000000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO,
+ },
+ /* RAM 00*/ {
+ .phys_start = 0x40000000,
+ .virt_start = 0x40000000,
+ .size = 0x73c00000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_EXECUTE,
+ },
+ /* Inmate memory */{
+ .phys_start = 0xb3c00000,
+ .virt_start = 0xb3c00000,
+ .size = 0x04000000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_EXECUTE,
+ },
+ /* RAM 01 */ {
+ .phys_start = 0xb8000000,
+ .virt_start = 0xb8000000,
+ .size = 0x03700000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_EXECUTE,
+ },
+ /* Loader */{
+ .phys_start = 0xbb700000,
+ .virt_start = 0xbb700000,
+ .size = 0x100000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_EXECUTE,
+ },
+ /* RAM 02 */ {
+ .phys_start = 0xbbc00000,
+ .virt_start = 0xbbc00000,
+ .size = 0x02400000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_EXECUTE,
+ },
+ /* OP-TEE reserved memory */{
+ .phys_start = 0xbe000000,
+ .virt_start = 0xbe000000,
+ .size = 0x2000000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
+ },
+ },
+
+ .irqchips = {
+ /* GIC */ {
+ .address = 0x38800000,
+ .pin_base = 32,
+ .pin_bitmap = {
+ 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
+ },
+ },
+ /* GIC */ {
+ .address = 0x38800000,
+ .pin_base = 160,
+ .pin_bitmap = {
+ 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
+ },
+ },
+ /* GIC */ {
+ .address = 0x38800000,
+ .pin_base = 288,
+ .pin_bitmap = {
+ 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
+ },
+ },
+ },
+
+ .pci_devices = {
+ { /* IVSHMEM 0000:00:00.0 (demo) */
+ .type = JAILHOUSE_PCI_TYPE_IVSHMEM,
+ .domain = 0,
+ .bdf = 0 << 3,
+ .bar_mask = JAILHOUSE_IVSHMEM_BAR_MASK_INTX,
+ .shmem_regions_start = 0,
+ .shmem_dev_id = 0,
+ .shmem_peers = 3,
+ .shmem_protocol = JAILHOUSE_SHMEM_PROTO_UNDEFINED,
+ },
+ { /* IVSHMEM 0000:00:01.0 (networking) */
+ .type = JAILHOUSE_PCI_TYPE_IVSHMEM,
+ .domain = 0,
+ .bdf = 1 << 3,
+ .bar_mask = JAILHOUSE_IVSHMEM_BAR_MASK_INTX,
+ .shmem_regions_start = 5,
+ .shmem_dev_id = 0,
+ .shmem_peers = 2,
+ .shmem_protocol = JAILHOUSE_SHMEM_PROTO_VETH,
+ },
+ },
+};
--
2.17.1

Henning Schild

unread,
Mar 27, 2020, 7:11:06 AM3/27/20
to Alice Guo, jailho...@googlegroups.com, peng...@nxp.com
On Thu, 26 Mar 2020 21:20:24 +0800
Alice Guo <alic...@nxp.com> wrote:

> Signed-off-by: Alice Guo <alic...@nxp.com>
> ---
> configs/arm64/imx8mq-inmate-demo.c | 70 +++++++++++--
> configs/arm64/imx8mq-linux-demo.c | 158
> +++++++++++++++++++++++++++++ configs/arm64/imx8mq.c |
> 93 +++++++++++++++-- 3 files changed, 307 insertions(+), 14
> deletions(-) create mode 100644 configs/arm64/imx8mq-linux-demo.c
>
> diff --git a/configs/arm64/imx8mq-inmate-demo.c
> b/configs/arm64/imx8mq-inmate-demo.c index 8c1ad624..d3c89aec 100644
> --- a/configs/arm64/imx8mq-inmate-demo.c
> +++ b/configs/arm64/imx8mq-inmate-demo.c
> @@ -1,7 +1,7 @@
> /*
> * iMX8MQ target - inmate demo
> *
> - * Copyright NXP 2018
> + * Copyright 2018-2019 NXP

Maybe even 2020? And that is the only update to the several files you
touch, maybe do them all.

Henning

Jan Kiszka

unread,
Mar 27, 2020, 8:36:16 AM3/27/20
to Alice Guo, Henning Schild, jailho...@googlegroups.com, peng...@nxp.com
On 27.03.20 12:11, Henning Schild wrote:
> On Thu, 26 Mar 2020 21:20:24 +0800
> Alice Guo <alic...@nxp.com> wrote:
>
>> Signed-off-by: Alice Guo <alic...@nxp.com>
>> ---
>> configs/arm64/imx8mq-inmate-demo.c | 70 +++++++++++--
>> configs/arm64/imx8mq-linux-demo.c | 158
>> +++++++++++++++++++++++++++++ configs/arm64/imx8mq.c |
>> 93 +++++++++++++++-- 3 files changed, 307 insertions(+), 14
>> deletions(-) create mode 100644 configs/arm64/imx8mq-linux-demo.c
>>
>> diff --git a/configs/arm64/imx8mq-inmate-demo.c
>> b/configs/arm64/imx8mq-inmate-demo.c index 8c1ad624..d3c89aec 100644
>> --- a/configs/arm64/imx8mq-inmate-demo.c
>> +++ b/configs/arm64/imx8mq-inmate-demo.c
>> @@ -1,7 +1,7 @@
>> /*
>> * iMX8MQ target - inmate demo
>> *
>> - * Copyright NXP 2018
>> + * Copyright 2018-2019 NXP
>
> Maybe even 2020? And that is the only update to the several files you
> touch, maybe do them all.

I can fix this up on merge, just let me know.

Jan

Peng Fan

unread,
Mar 27, 2020, 9:18:04 AM3/27/20
to Jan Kiszka, Alice Guo, Henning Schild, jailho...@googlegroups.com
> Subject: Re: [PATCH V2 1/2] Cell configs for imx8mq EVK board.
That should be 2020. Please help fix when merge, then we no need a v3
if no other major comments.

Thanks,
Peng.
>
> Jan
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