[PATCH v3 0/3] Add support for Pine64+ board

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Vijai Kumar K

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Feb 4, 2020, 5:13:26 AM2/4/20
to jailho...@googlegroups.com, Vijai Kumar K
Hi Jan,

Sorry. It took sometime to send this v3.

As suggested, I have added the ivshmem-demo and linux-demo
as well.

Changes since v2:

- Added support for ivshmem-demo
- Added support for linux-demo
- Rebased on top of next

Thanks,
Vijai Kumar K


Vijai Kumar K (3):
configs/arm64: Add support for pine64-plus board
configs/arm64: Add inmate demo for pine64-plus board
Add Linux demo for pine64-plus

configs/arm64/dts/inmate-pine64-plus.dts | 114 +++++++
configs/arm64/pine64-plus-inmate-demo.c | 131 ++++++++
configs/arm64/pine64-plus-linux-demo.c | 149 +++++++++
configs/arm64/pine64-plus.c | 376 +++++++++++++++++++++++
4 files changed, 770 insertions(+)
create mode 100644 configs/arm64/dts/inmate-pine64-plus.dts
create mode 100644 configs/arm64/pine64-plus-inmate-demo.c
create mode 100644 configs/arm64/pine64-plus-linux-demo.c
create mode 100644 configs/arm64/pine64-plus.c

--
2.17.1

Vijai Kumar K

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Feb 4, 2020, 5:13:29 AM2/4/20
to jailho...@googlegroups.com, Vijai Kumar K
Add config for Pine64+ board.
https://www.pine64.org/devices/single-board-computers/pine-a64/

Allwinner A64(Quad core A53) + 2GB RAM

Signed-off-by: Vijai Kumar K <vijaikumar....@gmail.com>
---
configs/arm64/pine64-plus.c | 376 ++++++++++++++++++++++++++++++++++++
1 file changed, 376 insertions(+)
create mode 100644 configs/arm64/pine64-plus.c

diff --git a/configs/arm64/pine64-plus.c b/configs/arm64/pine64-plus.c
new file mode 100644
index 00000000..24b4a61c
--- /dev/null
+++ b/configs/arm64/pine64-plus.c
@@ -0,0 +1,376 @@
+/*
+ * Jailhouse, a Linux-based partitioning hypervisor
+ *
+ * Configuration for Pine64+ board, 2 GB
+ *
+ * Copyright (c) Vijai Kumar K, 2019-2020
+ *
+ * Authors:
+ * Vijai Kumar K <vijaikumar....@gmail.com>
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2. See
+ * the COPYING file in the top-level directory.
+ */
+
+#include <jailhouse/types.h>
+#include <jailhouse/cell-config.h>
+
+struct {
+ struct jailhouse_system header;
+ __u64 cpus[1];
+ struct jailhouse_memory mem_regions[43];
+ struct jailhouse_irqchip irqchips[1];
+ struct jailhouse_pci_device pci_devices[2];
+} __attribute__((packed)) config = {
+ .header = {
+ .signature = JAILHOUSE_SYSTEM_SIGNATURE,
+ .revision = JAILHOUSE_CONFIG_REVISION,
+ .flags = JAILHOUSE_SYS_VIRTUAL_DEBUG_CONSOLE,
+ .hypervisor_memory = {
+ .phys_start = 0xbc000000,
+ .size = 0x04000000,
+ },
+ .debug_console = {
+ .address = 0x01c28000,
+ .size = 0x400,
+ .type = JAILHOUSE_CON_TYPE_8250,
+ .flags = JAILHOUSE_CON_ACCESS_MMIO |
+ JAILHOUSE_CON_REGDIST_4,
+ },
+ .platform_info = {
+ .pci_mmconfig_base = 0x02000000,
+ .pci_mmconfig_end_bus = 0,
+ .pci_is_virtual = 1,
+ .pci_domain = 1,
+ .arm = {
+ .gic_version = 2,
+ .gicd_base = 0x01c81000,
+ .gicc_base = 0x01c82000,
+ .gich_base = 0x01c84000,
+ .gicv_base = 0x01c86000,
+ .maintenance_irq = 25,
+ },
+ },
+ .root_cell = {
+ .name = "Pine64-Plus",
+
+ .cpu_set_size = sizeof(config.cpus),
+ .num_memory_regions = ARRAY_SIZE(config.mem_regions),
+ .num_pci_devices = ARRAY_SIZE(config.pci_devices),
+ .num_irqchips = ARRAY_SIZE(config.irqchips),
+
+ .vpci_irq_base = 108,
+ },
+ },
+
+ .cpus = {
+ 0xf,
+ },
+
+ .mem_regions = {
+ /* IVSHMEM shared memory regions for 00:00.0 (demo) */
+ /* State Table */ {
+ .phys_start = 0xbbef1000,
+ .virt_start = 0xbbef1000,
+ .size = 0x1000,
+ .flags = JAILHOUSE_MEM_READ,
+ },
+ /* Read/Write Section */ {
+ .phys_start = 0xbbef2000,
+ .virt_start = 0xbbef2000,
+ .size = 0x9000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
+ },
+ /* Output (peer 0) */ {
+ .phys_start = 0xbbefb000,
+ .virt_start = 0xbbefb000,
+ .size = 0x2000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
+ },
+ /* Output (peer 1) */ {
+ .phys_start = 0xbbefd000,
+ .virt_start = 0xbbefd000,
+ .size = 0x2000,
+ .flags = JAILHOUSE_MEM_READ,
+ },
+ /* Output (peer 2) */ {
+ .phys_start = 0xbbeff000,
+ .virt_start = 0xbbeff000,
+ .size = 0x2000,
+ .flags = JAILHOUSE_MEM_READ,
+ },
+ /* IVSHMEM shared memory region for 00:01.0 (networking)*/
+ JAILHOUSE_SHMEM_NET_REGIONS(0xbbf01000, 0),
+ /* SRAM */ {
+ .phys_start = 0x00018000,
+ .virt_start = 0x00018000,
+ .size = 0x00028000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_EXECUTE,
+ },
+ /* Clock */ {
+ .phys_start = 0x01000000,
+ .virt_start = 0x01000000,
+ .size = 0x00100000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO | JAILHOUSE_MEM_IO_32,
+ },
+ /* 1100000.mixer */ {
+ .phys_start = 0x01100000,
+ .virt_start = 0x01100000,
+ .size = 0x00100000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO,
+ },
+ /* 1200000.mixer */ {
+ .phys_start = 0x01200000,
+ .virt_start = 0x01200000,
+ .size = 0x00100000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO,
+ },
+ /* Syscon */ {
+ .phys_start = 0x01c00000,
+ .virt_start = 0x01c00000,
+ .size = 0x00001000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO,
+ },
+ /* DMA */ {
+ .phys_start = 0x01c02000,
+ .virt_start = 0x01c02000,
+ .size = 0x00001000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO,
+ },
+ /* LCD1 */ {
+ .phys_start = 0x01c0c000,
+ .virt_start = 0x01c0c000,
+ .size = 0x00001000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO,
+ },
+ /* LCD2 */ {
+ .phys_start = 0x01c0d000,
+ .virt_start = 0x01c0d000,
+ .size = 0x00001000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO,
+ },
+ /* MMC */ {
+ .phys_start = 0x01c0f000,
+ .virt_start = 0x01c0f000,
+ .size = 0x00001000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO,
+ },
+ /* EEPROM */ {
+ .phys_start = 0x01c14000,
+ .virt_start = 0x01c14000,
+ .size = 0x00000400,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO,
+ },
+ /* USB */ {
+ .phys_start = 0x01c19000,
+ .virt_start = 0x01c19000,
+ .size = 0x00000400,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO,
+ },
+ /* USB */ {
+ .phys_start = 0x01c19400,
+ .virt_start = 0x01c19400,
+ .size = 0x00000014,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO,
+ },
+ /* USB */ {
+ .phys_start = 0x01c1a000,
+ .virt_start = 0x01c1a000,
+ .size = 0x00000100,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO,
+ },
+ /* USB */ {
+ .phys_start = 0x01c1a400,
+ .virt_start = 0x01c1a400,
+ .size = 0x00000100,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO,
+ },
+ /* USB */ {
+ .phys_start = 0x01c1a800,
+ .virt_start = 0x01c1a800,
+ .size = 0x00000100,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO,
+ },
+ /* USB */ {
+ .phys_start = 0x01c1b000,
+ .virt_start = 0x01c1b000,
+ .size = 0x00000100,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO,
+ },
+ /* USB */ {
+ .phys_start = 0x01c1b400,
+ .virt_start = 0x01c1b400,
+ .size = 0x00000100,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO,
+ },
+ /* USB */ {
+ .phys_start = 0x01c1b800,
+ .virt_start = 0x01c1b800,
+ .size = 0x00000004,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO,
+ },
+ /* Clock */ {
+ .phys_start = 0x01c20000,
+ .virt_start = 0x01c20000,
+ .size = 0x00000400,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO | JAILHOUSE_MEM_IO_32,
+ },
+ /* Pincontrol */ {
+ .phys_start = 0x01c20800,
+ .virt_start = 0x01c20800,
+ .size = 0x00000400,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO | JAILHOUSE_MEM_IO_32,
+ },
+ /* Watchdog */ {
+ .phys_start = 0x01c20ca0,
+ .virt_start = 0x01c20ca0,
+ .size = 0x00000020,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO | JAILHOUSE_MEM_IO_32,
+ },
+ /* UART */ {
+ .phys_start = 0x01c28000,
+ .virt_start = 0x01c28000,
+ .size = 0x00000020,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO | JAILHOUSE_MEM_IO_32,
+ },
+ /* I2C */ {
+ .phys_start = 0x01c2b000,
+ .virt_start = 0x01c2b000,
+ .size = 0x00000400,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO,
+ },
+ /* Ethernet */ {
+ .phys_start = 0x01c30000,
+ .virt_start = 0x01c30000,
+ .size = 0x00010000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO,
+ },
+ /* GPU */ {
+ .phys_start = 0x01c40000,
+ .virt_start = 0x01c40000,
+ .size = 0x00010000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO,
+ },
+ /* SRAM */ {
+ .phys_start = 0x01d00000,
+ .virt_start = 0x01d00000,
+ .size = 0x00040000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_EXECUTE,
+ },
+ /* HDMI */ {
+ .phys_start = 0x01ee0000,
+ .virt_start = 0x01ee0000,
+ .size = 0x00010000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO,
+ },
+ /* HDMI */ {
+ .phys_start = 0x01ef0000,
+ .virt_start = 0x01ef0000,
+ .size = 0x00010000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO,
+ },
+ /* RTC */ {
+ .phys_start = 0x01f00000,
+ .virt_start = 0x01f00000,
+ .size = 0x00000400,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO | JAILHOUSE_MEM_IO_32,
+ },
+ /* Interrupt Controller */ {
+ .phys_start = 0x01f00c00,
+ .virt_start = 0x01f00c00,
+ .size = 0x00000400,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO | JAILHOUSE_MEM_IO_32,
+ },
+ /* Clock */ {
+ .phys_start = 0x01f01400,
+ .virt_start = 0x01f01400,
+ .size = 0x00000100,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO | JAILHOUSE_MEM_IO_32,
+ },
+ /* Pincontrol */ {
+ .phys_start = 0x01f02c00,
+ .virt_start = 0x01f02c00,
+ .size = 0x00000400,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO | JAILHOUSE_MEM_IO_32,
+ },
+ /* RSB(Reduced Serial Bus) */ {
+ .phys_start = 0x01f03400,
+ .virt_start = 0x01f03400,
+ .size = 0x00000400,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO,
+ },
+ /* System RAM */ {
+ .phys_start = 0x40000000,
+ .virt_start = 0x40000000,
+ .size = 0x7bef1000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_EXECUTE,
+ },
+ },
+
+ .irqchips = {
+ /* GIC */ {
+ .address = 0x01c81000,
+ .pin_base = 32,
+ .pin_bitmap = {
+ 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
+ },
+ },
+ },
+
+ .pci_devices = {
+ { /* IVSHMEM 0001:00:00.0 (demo) */
+ .type = JAILHOUSE_PCI_TYPE_IVSHMEM,
+ .domain = 1,
+ .bdf = 0 << 3,
+ .bar_mask = JAILHOUSE_IVSHMEM_BAR_MASK_INTX,
+ .shmem_regions_start = 0,
+ .shmem_dev_id = 0,
+ .shmem_peers = 3,
+ .shmem_protocol = JAILHOUSE_SHMEM_PROTO_UNDEFINED,
+ },
+ /* IVSHMEM 0001:00:01.0 (networking) */ {
+ .type = JAILHOUSE_PCI_TYPE_IVSHMEM,
+ .domain = 1,
+ .bdf = 1 << 3,
+ .bar_mask = JAILHOUSE_IVSHMEM_BAR_MASK_INTX,
+ .shmem_regions_start = 5,
+ .shmem_dev_id = 0,
+ .shmem_peers = 2,
+ .shmem_protocol = JAILHOUSE_SHMEM_PROTO_VETH,
+ },
+ },
+};
--
2.17.1

Vijai Kumar K

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Feb 4, 2020, 5:13:32 AM2/4/20
to jailho...@googlegroups.com, Vijai Kumar K
- GIC demo and ivshmem-demo are validated.

Signed-off-by: Vijai Kumar K <vijaikumar....@gmail.com>
---
configs/arm64/pine64-plus-inmate-demo.c | 131 ++++++++++++++++++++++++
1 file changed, 131 insertions(+)
create mode 100644 configs/arm64/pine64-plus-inmate-demo.c

diff --git a/configs/arm64/pine64-plus-inmate-demo.c b/configs/arm64/pine64-plus-inmate-demo.c
new file mode 100644
index 00000000..0564412d
--- /dev/null
+++ b/configs/arm64/pine64-plus-inmate-demo.c
@@ -0,0 +1,131 @@
+/*
+ * Jailhouse, a Linux-based partitioning hypervisor
+ *
+ * Configuration for gic-demo inmate on Pine64+ board
+ *
+ * Copyright (c) Vijai Kumar K, 2019-2020
+ *
+ * Authors:
+ * Vijai Kumar K <vijaikumar....@gmail.com>
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2. See
+ * the COPYING file in the top-level directory.
+ */
+
+#include <jailhouse/types.h>
+#include <jailhouse/cell-config.h>
+
+struct {
+ struct jailhouse_cell_desc cell;
+ __u64 cpus[1];
+ struct jailhouse_memory mem_regions[8];
+ struct jailhouse_irqchip irqchips[1];
+ struct jailhouse_pci_device pci_devices[1];
+} __attribute__((packed)) config = {
+ .cell = {
+ .signature = JAILHOUSE_CELL_DESC_SIGNATURE,
+ .revision = JAILHOUSE_CONFIG_REVISION,
+ .name = "inmate-demo",
+ .flags = JAILHOUSE_CELL_PASSIVE_COMMREG,
+
+ .cpu_set_size = sizeof(config.cpus),
+ .num_memory_regions = ARRAY_SIZE(config.mem_regions),
+ .num_pci_devices = ARRAY_SIZE(config.pci_devices),
+ .num_irqchips = ARRAY_SIZE(config.irqchips),
+ .vpci_irq_base = 125,
+
+ .console = {
+ .address = 0x1c28000,
+ .type = JAILHOUSE_CON_TYPE_8250,
+ .flags = JAILHOUSE_CON_ACCESS_MMIO |
+ JAILHOUSE_CON_REGDIST_4,
+ },
+ },
+
+ .cpus = {
+ 0x2,
+ },
+
+ .mem_regions = {
+ /* IVSHMEM shared memory regions for 00:00.0 (demo) */
+ /* State Table */ {
+ .phys_start = 0xbbef1000,
+ .virt_start = 0xbbef1000,
+ .size = 0x1000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_ROOTSHARED,
+ },
+ /* Read/Write Section */ {
+ .phys_start = 0xbbef2000,
+ .virt_start = 0xbbef2000,
+ .size = 0x9000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_ROOTSHARED,
+ },
+ /* Output (peer 0) */ {
+ .phys_start = 0xbbefb000,
+ .virt_start = 0xbbefb000,
+ .size = 0x2000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_ROOTSHARED,
+ },
+ /* Output (peer 1) */ {
+ .phys_start = 0xbbefd000,
+ .virt_start = 0xbbefd000,
+ .size = 0x2000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_ROOTSHARED,
+ },
+ /* Output (peer 2) */ {
+ .phys_start = 0xbbeff000,
+ .virt_start = 0xbbeff000,
+ .size = 0x2000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_ROOTSHARED,
+ },
+ /* UART */ {
+ .phys_start = 0x1c28000,
+ .virt_start = 0x1c28000,
+ .size = 0x400,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO | JAILHOUSE_MEM_IO_32 |
+ JAILHOUSE_MEM_ROOTSHARED,
+ },
+ /* RAM */ {
+ .phys_start = 0xbbee1000,
+ .virt_start = 0,
+ .size = 0x00010000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_LOADABLE,
+ },
+ /* communication region */ {
+ .virt_start = 0x80000000,
+ .size = 0x00001000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_COMM_REGION,
+ },
+ },
+
+ .irqchips = {
+ /* GIC */ {
+ .address = 0x01c81000,
+ .pin_base = 32,
+ .pin_bitmap = {
+ 0,
+ 0,
+ 0,
+ (1 << (157 - 128))
+ },
+ },
+ },
+
+ .pci_devices = {
+ { /* IVSHMEM 0001:00:00.0 (demo) */
+ .type = JAILHOUSE_PCI_TYPE_IVSHMEM,
+ .domain = 1,
+ .bdf = 0 << 3,
+ .bar_mask = JAILHOUSE_IVSHMEM_BAR_MASK_INTX,
+ .shmem_regions_start = 0,
+ .shmem_dev_id = 1,
+ .shmem_peers = 3,
+ .shmem_protocol = JAILHOUSE_SHMEM_PROTO_UNDEFINED,
+ },
+ },
+};
--
2.17.1

Vijai Kumar K

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Feb 4, 2020, 5:13:36 AM2/4/20
to jailho...@googlegroups.com, Vijai Kumar K
Add Linux demo with 2 CPUs and 128M RAM for Pine64+.

Signed-off-by: Vijai Kumar K <vijaikumar....@gmail.com>
---
configs/arm64/dts/inmate-pine64-plus.dts | 114 +++++++++++++++++
configs/arm64/pine64-plus-linux-demo.c | 149 +++++++++++++++++++++++
2 files changed, 263 insertions(+)
create mode 100644 configs/arm64/dts/inmate-pine64-plus.dts
create mode 100644 configs/arm64/pine64-plus-linux-demo.c

diff --git a/configs/arm64/dts/inmate-pine64-plus.dts b/configs/arm64/dts/inmate-pine64-plus.dts
new file mode 100644
index 00000000..0f980c98
--- /dev/null
+++ b/configs/arm64/dts/inmate-pine64-plus.dts
@@ -0,0 +1,114 @@
+/*
+ * Jailhouse, a Linux-based partitioning hypervisor
+ *
+ * Device tree for Linux inmate test on Pine64+ board,
+ * corresponds to configs/arm64/pine64-plus-linux-demo.c
+ *
+ * Copyright (c) Vijai Kumar K, 2019-2020
+ *
+ * Authors:
+ * Vijai Kumar K <vijaikumar....@gmail.com>
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2. See
+ * the COPYING file in the top-level directory.
+ */
+
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+/dts-v1/;
+
+/ {
+ model = "Jailhouse cell on Pine64+";
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ interrupt-parent = <&gic>;
+
+ hypervisor {
+ compatible = "jailhouse,cell";
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu@2 {
+ compatible = "arm,cortex-a53";
+ device_type = "cpu";
+ reg = <2>;
+ enable-method = "psci";
+ };
+
+ cpu@3 {
+ compatible = "arm,cortex-a53";
+ device_type = "cpu";
+ reg = <3>;
+ enable-method = "psci";
+ };
+ };
+
+ psci {
+ compatible = "arm,psci-0.2";
+ method = "smc";
+ };
+
+ timer {
+ compatible = "arm,armv8-timer";
+ interrupts = <GIC_PPI 13
+ (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 14
+ (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 11
+ (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 10
+ (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
+ };
+
+ clocks {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ osc24M: clk24M {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <24000000>;
+ clock-output-names = "osc24M";
+ };
+ };
+
+ gic: interrupt-controller@01c81000 {
+ compatible = "arm,gic-400";
+ reg = <0x01c81000 0x1000>,
+ <0x01c82000 0x2000>;
+ interrupt-controller;
+ #interrupt-cells = <3>;
+ };
+
+ uart: serial@01c28000 {
+ compatible = "snps,dw-apb-uart";
+ reg = <0x01c28000 0x400>;
+ interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
+ reg-shift = <2>;
+ reg-io-width = <4>;
+ clock-frequency = <24000000>;
+ };
+
+ pci@02000000 {
+ compatible = "pci-host-ecam-generic";
+ device_type = "pci";
+ bus-range = <0 0>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ #interrupt-cells = <1>;
+ interrupt-map-mask = <0 0 0 7>;
+ interrupt-map = <0 0 0 1 &gic GIC_SPI 123 IRQ_TYPE_EDGE_RISING>,
+ <0 0 0 2 &gic GIC_SPI 124 IRQ_TYPE_EDGE_RISING>,
+ <0 0 0 3 &gic GIC_SPI 125 IRQ_TYPE_EDGE_RISING>,
+ <0 0 0 4 &gic GIC_SPI 126 IRQ_TYPE_EDGE_RISING>;
+ reg = <0x02000000 0x100000>;
+ ranges =
+ <0x02000000 0x00 0x10000000 0x10000000 0x00 0x10000>;
+ };
+};
diff --git a/configs/arm64/pine64-plus-linux-demo.c b/configs/arm64/pine64-plus-linux-demo.c
new file mode 100644
index 00000000..55f59b35
--- /dev/null
+++ b/configs/arm64/pine64-plus-linux-demo.c
@@ -0,0 +1,149 @@
+/*
+ * Jailhouse, a Linux-based partitioning hypervisor
+ *
+ * Configuration for linux-demo inmate on Pine64+ board:
+ * 2 CPU, 128M RAM, serial port 0
+ *
+ * Copyright (c) Vijai Kumar K, 2019-2020
+ *
+ * Authors:
+ * Vijai Kumar K <vijaikumar....@gmail.com>
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2. See
+ * the COPYING file in the top-level directory.
+ */
+
+#include <jailhouse/types.h>
+#include <jailhouse/cell-config.h>
+
+struct {
+ struct jailhouse_cell_desc cell;
+ __u64 cpus[1];
+ struct jailhouse_memory mem_regions[13];
+ struct jailhouse_irqchip irqchips[1];
+ struct jailhouse_pci_device pci_devices[2];
+} __attribute__((packed)) config = {
+ .cell = {
+ .signature = JAILHOUSE_CELL_DESC_SIGNATURE,
+ .revision = JAILHOUSE_CONFIG_REVISION,
+ .name = "pine64-plus-linux-demo",
+ .flags = JAILHOUSE_CELL_PASSIVE_COMMREG |
+ JAILHOUSE_CELL_VIRTUAL_CONSOLE_PERMITTED,
+
+ .cpu_set_size = sizeof(config.cpus),
+ .num_memory_regions = ARRAY_SIZE(config.mem_regions),
+ .num_irqchips = ARRAY_SIZE(config.irqchips),
+ .num_pci_devices = ARRAY_SIZE(config.pci_devices),
+
+ .vpci_irq_base = 123,
+
+ .console = {
+ .address = 0x01c28000,
+ .type = JAILHOUSE_CON_TYPE_8250,
+ .flags = JAILHOUSE_CON_ACCESS_MMIO |
+ JAILHOUSE_CON_REGDIST_4,
+ },
+ },
+
+ .cpus = {
+ 0xc,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_ROOTSHARED,
+ },
+ /* Output (peer 2) */ {
+ .phys_start = 0xbbeff000,
+ .virt_start = 0xbbeff000,
+ .size = 0x2000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_ROOTSHARED,
+ },
+ /* IVSHMEM shared memory region */
+ JAILHOUSE_SHMEM_NET_REGIONS(0xbbf01000, 1),
+ /* UART 0-3 */ {
+ .phys_start = 0x01c28000,
+ .virt_start = 0x01c28000,
+ .size = 0x1000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO | JAILHOUSE_MEM_ROOTSHARED,
+ },
+ /* RAM */ {
+ .phys_start = 0xbb900000,
+ .virt_start = 0,
+ .size = 0x10000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_LOADABLE,
+ },
+ /* RAM */ {
+ .phys_start = 0xb0000000,
+ .virt_start = 0xb0000000,
+ .size = 0x8000000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA |
+ JAILHOUSE_MEM_LOADABLE,
+ },
+ /* communication region */ {
+ .virt_start = 0x80000000,
+ .size = 0x00001000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_COMM_REGION,
+ },
+ },
+
+ .irqchips = {
+ /* GIC */ {
+ .address = 0x01c81000,
+ .pin_base = 32,
+ .pin_bitmap = {
+ 1 << (32-32), 0, 0, 1 << (155-128),
+ },
+ },
+ },
+
+ .pci_devices = {
+ { /* IVSHMEM 00:00.0 (demo) */
+ .type = JAILHOUSE_PCI_TYPE_IVSHMEM,
+ .domain = 1,
+ .bdf = 0 << 3,
+ .bar_mask = JAILHOUSE_IVSHMEM_BAR_MASK_INTX,
+ .shmem_regions_start = 0,
+ .shmem_dev_id = 2,
+ .shmem_peers = 3,
+ .shmem_protocol = JAILHOUSE_SHMEM_PROTO_UNDEFINED,
+ },
+ /* IVSHMEM 00:01.0 (networking) */ {
+ .type = JAILHOUSE_PCI_TYPE_IVSHMEM,
+ .bdf = 1 << 3,
+ .bar_mask = JAILHOUSE_IVSHMEM_BAR_MASK_INTX,
+ .shmem_regions_start = 5,
+ .shmem_dev_id = 2,
+ .shmem_peers = 2,
+ .shmem_protocol = JAILHOUSE_SHMEM_PROTO_VETH,

vijai kumar

unread,
Feb 4, 2020, 5:22:26 AM2/4/20
to Jailhouse
To add, please use mem=1792M. Not captured explicitly anywhere in this patch I guess..

I have a WIP setup for jailhouse-images. I would clean that up and send it across
some time over the weekend when I find some time.

Thanks,
Vijai Kumar K

Jan Kiszka

unread,
Feb 4, 2020, 8:53:44 AM2/4/20
to vijai kumar, Jailhouse
On 04.02.20 11:22, vijai kumar wrote:
> To add, please use mem=1792M. Not captured explicitly anywhere in this
> patch I guess..
>

We can add a correspending comment to the header of
configs/arm64/pine64-plus.c, like other configs have.

> I have a WIP setup for jailhouse-images. I would clean that up and send
> it across
> some time over the weekend when I find some time.

Cool! I will look into this series after the release of Jailhouse and
jailhouse-images.

Thanks,
Jan
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Corporate Competence Center Embedded Linux

Jan Kiszka

unread,
Feb 6, 2020, 5:00:54 AM2/6/20
to Vijai Kumar K, jailho...@googlegroups.com
Domain is actually 0 for this inmate, but also meaningless (only
processed by the Linux driver for the root cell).

> + .bdf = 0 << 3,
> + .bar_mask = JAILHOUSE_IVSHMEM_BAR_MASK_INTX,
> + .shmem_regions_start = 0,
> + .shmem_dev_id = 1,
> + .shmem_peers = 3,
> + .shmem_protocol = JAILHOUSE_SHMEM_PROTO_UNDEFINED,
> + },
> + },
> +};
>

Jan

Jan Kiszka

unread,
Feb 6, 2020, 5:01:12 AM2/6/20
to Vijai Kumar K, jailho...@googlegroups.com
Subjects should be prefixed with "configs: arm64:".

On 04.02.20 11:13, Vijai Kumar K wrote:
You also need to grant access to 156, for the device 00:01.0. Otherwise,
ivshmem-net will not work. I just did that mistake, see my latest patch...

> + },
> + },
> + },
> +
> + .pci_devices = {
> + { /* IVSHMEM 00:00.0 (demo) */
> + .type = JAILHOUSE_PCI_TYPE_IVSHMEM,
> + .domain = 1,
> + .bdf = 0 << 3,
> + .bar_mask = JAILHOUSE_IVSHMEM_BAR_MASK_INTX,
> + .shmem_regions_start = 0,
> + .shmem_dev_id = 2,
> + .shmem_peers = 3,
> + .shmem_protocol = JAILHOUSE_SHMEM_PROTO_UNDEFINED,
> + },
> + /* IVSHMEM 00:01.0 (networking) */ {
> + .type = JAILHOUSE_PCI_TYPE_IVSHMEM,
> + .bdf = 1 << 3,
> + .bar_mask = JAILHOUSE_IVSHMEM_BAR_MASK_INTX,
> + .shmem_regions_start = 5,
> + .shmem_dev_id = 2,

Device ID is 1 - this is a 2-peers-only ivshmem device.

> + .shmem_peers = 2,
> + .shmem_protocol = JAILHOUSE_SHMEM_PROTO_VETH,
> + },
> + },
> +};
>

Vijai Kumar K

unread,
Feb 11, 2020, 4:50:29 AM2/11/20
to jailho...@googlegroups.com, Vijai Kumar K
Add config for Pine64+ board.
https://www.pine64.org/devices/single-board-computers/pine-a64/

Allwinner A64(Quad core A53) + 2GB RAM

Signed-off-by: Vijai Kumar K <vijaikumar....@gmail.com>
---
Changes in v4:
Addressed review comments from Jan.
- Added mem=1792M in comments
- Removed meaningless pci domains
- Added IRQ(156) for ivshmem-net
- Fixed shmemid for ivshmem net

configs/arm64/pine64-plus.c | 375 ++++++++++++++++++++++++++++++++++++
1 file changed, 375 insertions(+)
create mode 100644 configs/arm64/pine64-plus.c

diff --git a/configs/arm64/pine64-plus.c b/configs/arm64/pine64-plus.c
new file mode 100644
index 00000000..c824ca78
--- /dev/null
+++ b/configs/arm64/pine64-plus.c
@@ -0,0 +1,375 @@
+/*
+ * Jailhouse, a Linux-based partitioning hypervisor
+ *
+ * Configuration for Pine64+ board, 2 GB
+ *
+ * Copyright (c) Vijai Kumar K, 2019-2020
+ *
+ * Authors:
+ * Vijai Kumar K <vijaikumar....@gmail.com>
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2. See
+ * the COPYING file in the top-level directory.
+ *
+ * NOTE: Add "mem=1792M" to the kernel command line.
+ */
+
+#include <jailhouse/types.h>
+#include <jailhouse/cell-config.h>
+
+struct {
+ struct jailhouse_system header;
+ __u64 cpus[1];
+ struct jailhouse_memory mem_regions[43];
+ struct jailhouse_irqchip irqchips[1];
+ struct jailhouse_pci_device pci_devices[2];
+} __attribute__((packed)) config = {
+ .header = {
+ .signature = JAILHOUSE_SYSTEM_SIGNATURE,
+ .revision = JAILHOUSE_CONFIG_REVISION,
+ .flags = JAILHOUSE_SYS_VIRTUAL_DEBUG_CONSOLE,
+ .hypervisor_memory = {
+ .phys_start = 0xbc000000,
+ .size = 0x04000000,
+ },
+ .debug_console = {
+ .address = 0x01c28000,
+ .size = 0x400,
+ .type = JAILHOUSE_CON_TYPE_8250,
+ .flags = JAILHOUSE_CON_ACCESS_MMIO |
+ JAILHOUSE_CON_REGDIST_4,
+ },
+ .platform_info = {
+ .pci_mmconfig_base = 0x02000000,
+ .pci_mmconfig_end_bus = 0,
+ .pci_is_virtual = 1,
+ .arm = {
+ .gic_version = 2,
+ .gicd_base = 0x01c81000,
+ .gicc_base = 0x01c82000,
+ .gich_base = 0x01c84000,
+ .gicv_base = 0x01c86000,
+ .maintenance_irq = 25,
+ },
+ },
+ .root_cell = {
+ .name = "Pine64-Plus",
+
+ .cpu_set_size = sizeof(config.cpus),
+ .num_memory_regions = ARRAY_SIZE(config.mem_regions),
+ .num_pci_devices = ARRAY_SIZE(config.pci_devices),
+ .num_irqchips = ARRAY_SIZE(config.irqchips),
+
+ .vpci_irq_base = 108,
+ },
+ },
+
+ .cpus = {
+ 0xf,
+ },
+
+ .mem_regions = {
+ /* IVSHMEM shared memory regions for 00:00.0 (demo) */
+ /* State Table */ {
+ .phys_start = 0xbbef1000,
+ .virt_start = 0xbbef1000,
+ .size = 0x1000,
+ .flags = JAILHOUSE_MEM_READ,
+ },
+ /* Read/Write Section */ {
+ .phys_start = 0xbbef2000,
+ .virt_start = 0xbbef2000,
+ .size = 0x9000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
+ },
+ /* Output (peer 0) */ {
+ .phys_start = 0xbbefb000,
+ .virt_start = 0xbbefb000,
+ .size = 0x2000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
+ },
+ /* Output (peer 1) */ {
+ .phys_start = 0xbbefd000,
+ .virt_start = 0xbbefd000,
+ .size = 0x2000,
+ .flags = JAILHOUSE_MEM_READ,
+ },
+ /* Output (peer 2) */ {
+ .phys_start = 0xbbeff000,
+ .virt_start = 0xbbeff000,
+ .size = 0x2000,
+ .flags = JAILHOUSE_MEM_READ,
+ },
+ /* IVSHMEM shared memory region for 00:01.0 (networking)*/
+ JAILHOUSE_SHMEM_NET_REGIONS(0xbbf01000, 0),
+ /* SRAM */ {
+ .phys_start = 0x00018000,
+ .virt_start = 0x00018000,
+ .size = 0x00028000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_EXECUTE,
+ },
+ /* Clock */ {
+ .phys_start = 0x01000000,
+ .virt_start = 0x01000000,
+ .size = 0x00100000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO | JAILHOUSE_MEM_IO_32,
+ },
+ /* 1100000.mixer */ {
+ .phys_start = 0x01100000,
+ .virt_start = 0x01100000,
+ .size = 0x00100000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO,
+ },
+ /* 1200000.mixer */ {
+ .phys_start = 0x01200000,
+ .virt_start = 0x01200000,
+ .size = 0x00100000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO,
+ },
+ /* Syscon */ {
+ .phys_start = 0x01c00000,
+ .virt_start = 0x01c00000,
+ .size = 0x00001000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO,
+ },
+ /* DMA */ {
+ .phys_start = 0x01c02000,
+ .virt_start = 0x01c02000,
+ .size = 0x00001000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO,
+ },
+ /* LCD1 */ {
+ .phys_start = 0x01c0c000,
+ .virt_start = 0x01c0c000,
+ .size = 0x00001000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO,
+ },
+ /* LCD2 */ {
+ .phys_start = 0x01c0d000,
+ .virt_start = 0x01c0d000,
+ .size = 0x00001000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO,
+ },
+ /* MMC */ {
+ .phys_start = 0x01c0f000,
+ .virt_start = 0x01c0f000,
+ .size = 0x00001000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO,
+ },
+ /* EEPROM */ {
+ .phys_start = 0x01c14000,
+ .virt_start = 0x01c14000,
+ .size = 0x00000400,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO,
+ },
+ /* USB */ {
+ .phys_start = 0x01c19000,
+ .virt_start = 0x01c19000,
+ .size = 0x00000400,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO,
+ },
+ /* USB */ {
+ .phys_start = 0x01c19400,
+ .virt_start = 0x01c19400,
+ .size = 0x00000014,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO,
+ },
+ /* USB */ {
+ .phys_start = 0x01c1a000,
+ .virt_start = 0x01c1a000,
+ .size = 0x00000100,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO,
+ },
+ /* USB */ {
+ .phys_start = 0x01c1a400,
+ .virt_start = 0x01c1a400,
+ .size = 0x00000100,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO,
+ },
+ /* USB */ {
+ .phys_start = 0x01c1a800,
+ .virt_start = 0x01c1a800,
+ .size = 0x00000100,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO,
+ },
+ /* USB */ {
+ .phys_start = 0x01c1b000,
+ .virt_start = 0x01c1b000,
+ .size = 0x00000100,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO,
+ },
+ /* USB */ {
+ .phys_start = 0x01c1b400,
+ .virt_start = 0x01c1b400,
+ .size = 0x00000100,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO,
+ },
+ /* USB */ {
+ .phys_start = 0x01c1b800,
+ .virt_start = 0x01c1b800,
+ .size = 0x00000004,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO,
+ },
+ /* Clock */ {
+ .phys_start = 0x01c20000,
+ .virt_start = 0x01c20000,
+ .size = 0x00000400,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO | JAILHOUSE_MEM_IO_32,
+ },
+ /* Pincontrol */ {
+ .phys_start = 0x01c20800,
+ .virt_start = 0x01c20800,
+ .size = 0x00000400,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO | JAILHOUSE_MEM_IO_32,
+ },
+ /* Watchdog */ {
+ .phys_start = 0x01c20ca0,
+ .virt_start = 0x01c20ca0,
+ .size = 0x00000020,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO | JAILHOUSE_MEM_IO_32,
+ },
+ /* UART */ {
+ .phys_start = 0x01c28000,
+ .virt_start = 0x01c28000,
+ .size = 0x00000020,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO | JAILHOUSE_MEM_IO_32,
+ },
+ /* I2C */ {
+ .phys_start = 0x01c2b000,
+ .virt_start = 0x01c2b000,
+ .size = 0x00000400,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO,
+ },
+ /* Ethernet */ {
+ .phys_start = 0x01c30000,
+ .virt_start = 0x01c30000,
+ .size = 0x00010000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO,
+ },
+ /* GPU */ {
+ .phys_start = 0x01c40000,
+ .virt_start = 0x01c40000,
+ .size = 0x00010000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO,
+ },
+ /* SRAM */ {
+ .phys_start = 0x01d00000,
+ .virt_start = 0x01d00000,
+ .size = 0x00040000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_EXECUTE,
+ },
+ /* HDMI */ {
+ .phys_start = 0x01ee0000,
+ .virt_start = 0x01ee0000,
+ .size = 0x00010000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO,
+ },
+ /* HDMI */ {
+ .phys_start = 0x01ef0000,
+ .virt_start = 0x01ef0000,
+ .size = 0x00010000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO,
+ },
+ /* RTC */ {
+ .phys_start = 0x01f00000,
+ .virt_start = 0x01f00000,
+ .size = 0x00000400,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO | JAILHOUSE_MEM_IO_32,
+ },
+ /* Interrupt Controller */ {
+ .phys_start = 0x01f00c00,
+ .virt_start = 0x01f00c00,
+ .size = 0x00000400,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO | JAILHOUSE_MEM_IO_32,
+ },
+ /* Clock */ {
+ .phys_start = 0x01f01400,
+ .virt_start = 0x01f01400,
+ .size = 0x00000100,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO | JAILHOUSE_MEM_IO_32,
+ },
+ /* Pincontrol */ {
+ .phys_start = 0x01f02c00,
+ .virt_start = 0x01f02c00,
+ .size = 0x00000400,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO | JAILHOUSE_MEM_IO_32,
+ },
+ /* RSB(Reduced Serial Bus) */ {
+ .phys_start = 0x01f03400,
+ .virt_start = 0x01f03400,
+ .size = 0x00000400,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO,
+ },
+ /* System RAM */ {
+ .phys_start = 0x40000000,
+ .virt_start = 0x40000000,
+ .size = 0x7bef1000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_EXECUTE,
+ },
+ },
+
+ .irqchips = {
+ /* GIC */ {
+ .address = 0x01c81000,
+ .pin_base = 32,
+ .pin_bitmap = {
+ 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
+ },
+ },
+ },
+
+ .pci_devices = {
+ { /* IVSHMEM 00:00.0 (demo) */
+ .type = JAILHOUSE_PCI_TYPE_IVSHMEM,
+ .bdf = 0 << 3,
+ .bar_mask = JAILHOUSE_IVSHMEM_BAR_MASK_INTX,
+ .shmem_regions_start = 0,
+ .shmem_dev_id = 0,
+ .shmem_peers = 3,
+ .shmem_protocol = JAILHOUSE_SHMEM_PROTO_UNDEFINED,
+ },
+ /* IVSHMEM 00:01.0 (networking) */ {
+ .type = JAILHOUSE_PCI_TYPE_IVSHMEM,
+ .bdf = 1 << 3,
+ .bar_mask = JAILHOUSE_IVSHMEM_BAR_MASK_INTX,
+ .shmem_regions_start = 5,
+ .shmem_dev_id = 0,
+ .shmem_peers = 2,
+ .shmem_protocol = JAILHOUSE_SHMEM_PROTO_VETH,
+ },
+ },
+};
--
2.17.1

Vijai Kumar K

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Feb 11, 2020, 4:50:33 AM2/11/20
to jailho...@googlegroups.com, Vijai Kumar K
- GIC demo and ivshmem-demo are validated.

Signed-off-by: Vijai Kumar K <vijaikumar....@gmail.com>
---
configs/arm64/pine64-plus-inmate-demo.c | 130 ++++++++++++++++++++++++
1 file changed, 130 insertions(+)
create mode 100644 configs/arm64/pine64-plus-inmate-demo.c

diff --git a/configs/arm64/pine64-plus-inmate-demo.c b/configs/arm64/pine64-plus-inmate-demo.c
new file mode 100644
index 00000000..73cde95c
--- /dev/null
+++ b/configs/arm64/pine64-plus-inmate-demo.c
@@ -0,0 +1,130 @@
+/*
+ * Jailhouse, a Linux-based partitioning hypervisor
+ *
+ * Configuration for gic-demo inmate on Pine64+ board
+ *
+ * Copyright (c) Vijai Kumar K, 2019-2020
+ *
+ * Authors:
+ * Vijai Kumar K <vijaikumar....@gmail.com>
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2. See
+ * the COPYING file in the top-level directory.
+ */
+
+#include <jailhouse/types.h>
+#include <jailhouse/cell-config.h>
+
+struct {
+ struct jailhouse_cell_desc cell;
+ __u64 cpus[1];
+ struct jailhouse_memory mem_regions[8];
+ struct jailhouse_irqchip irqchips[1];
+ struct jailhouse_pci_device pci_devices[1];
+} __attribute__((packed)) config = {
+ .cell = {
+ .signature = JAILHOUSE_CELL_DESC_SIGNATURE,
+ .revision = JAILHOUSE_CONFIG_REVISION,
+ .name = "inmate-demo",
+ .flags = JAILHOUSE_CELL_PASSIVE_COMMREG,
+
+ .cpu_set_size = sizeof(config.cpus),
+ .num_memory_regions = ARRAY_SIZE(config.mem_regions),
+ .num_pci_devices = ARRAY_SIZE(config.pci_devices),
+ .num_irqchips = ARRAY_SIZE(config.irqchips),
+ .vpci_irq_base = 125,
+
+ .console = {
+ .address = 0x1c28000,
+ .type = JAILHOUSE_CON_TYPE_8250,
+ .flags = JAILHOUSE_CON_ACCESS_MMIO |
+ JAILHOUSE_CON_REGDIST_4,
+ },
+ },
+
+ .cpus = {
+ 0x2,
+ },
+
+ .mem_regions = {
+ /* IVSHMEM shared memory regions for 00:00.0 (demo) */
+ /* State Table */ {
+ .phys_start = 0xbbef1000,
+ .virt_start = 0xbbef1000,
+ .size = 0x1000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_ROOTSHARED,
+ },
+ /* Read/Write Section */ {
+ .phys_start = 0xbbef2000,
+ .virt_start = 0xbbef2000,
+ .size = 0x9000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_ROOTSHARED,
+ },
+ /* Output (peer 0) */ {
+ .phys_start = 0xbbefb000,
+ .virt_start = 0xbbefb000,
+ .size = 0x2000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_ROOTSHARED,
+ },
+ /* Output (peer 1) */ {
+ .phys_start = 0xbbefd000,
+ .virt_start = 0xbbefd000,
+ .size = 0x2000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_ROOTSHARED,
+ },
+ /* Output (peer 2) */ {
+ .phys_start = 0xbbeff000,
+ .virt_start = 0xbbeff000,
+ .size = 0x2000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_ROOTSHARED,
+ },
+ /* UART */ {
+ .phys_start = 0x1c28000,
+ .virt_start = 0x1c28000,
+ .size = 0x400,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO | JAILHOUSE_MEM_IO_32 |
+ JAILHOUSE_MEM_ROOTSHARED,
+ },
+ /* RAM */ {
+ .phys_start = 0xbbee1000,
+ .virt_start = 0,
+ .size = 0x00010000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_LOADABLE,
+ },
+ /* communication region */ {
+ .virt_start = 0x80000000,
+ .size = 0x00001000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_COMM_REGION,
+ },
+ },
+
+ .irqchips = {
+ /* GIC */ {
+ .address = 0x01c81000,
+ .pin_base = 32,
+ .pin_bitmap = {
+ 0,
+ 0,
+ 0,
+ (1 << (157 - 128))
+ },
+ },
+ },
+
+ .pci_devices = {
+ { /* IVSHMEM 00:00.0 (demo) */
+ .type = JAILHOUSE_PCI_TYPE_IVSHMEM,
+ .bdf = 0 << 3,
+ .bar_mask = JAILHOUSE_IVSHMEM_BAR_MASK_INTX,
+ .shmem_regions_start = 0,
+ .shmem_dev_id = 1,
+ .shmem_peers = 3,
+ .shmem_protocol = JAILHOUSE_SHMEM_PROTO_UNDEFINED,
+ },
+ },
+};
--
2.17.1

Vijai Kumar K

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Feb 11, 2020, 4:50:36 AM2/11/20
to jailho...@googlegroups.com, Vijai Kumar K
Add Linux demo with 2 CPUs and 128M RAM for Pine64+.

Signed-off-by: Vijai Kumar K <vijaikumar....@gmail.com>
---
configs/arm64/dts/inmate-pine64-plus.dts | 114 +++++++++++++++++
configs/arm64/pine64-plus-linux-demo.c | 148 +++++++++++++++++++++++
2 files changed, 262 insertions(+)
create mode 100644 configs/arm64/dts/inmate-pine64-plus.dts
create mode 100644 configs/arm64/pine64-plus-linux-demo.c

diff --git a/configs/arm64/dts/inmate-pine64-plus.dts b/configs/arm64/dts/inmate-pine64-plus.dts
new file mode 100644
index 00000000..0f980c98
--- /dev/null
+++ b/configs/arm64/dts/inmate-pine64-plus.dts
@@ -0,0 +1,114 @@
+/*
+ * Jailhouse, a Linux-based partitioning hypervisor
+ *
+ * Device tree for Linux inmate test on Pine64+ board,
+ * corresponds to configs/arm64/pine64-plus-linux-demo.c
+ *
+ * Copyright (c) Vijai Kumar K, 2019-2020
+ *
+ * Authors:
+ * Vijai Kumar K <vijaikumar....@gmail.com>
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2. See
+ * the COPYING file in the top-level directory.
new file mode 100644
index 00000000..1d099906
--- /dev/null
+++ b/configs/arm64/pine64-plus-linux-demo.c
@@ -0,0 +1,148 @@
+/*
+ * Jailhouse, a Linux-based partitioning hypervisor
+ *
+ * Configuration for linux-demo inmate on Pine64+ board:
+ * 2 CPU, 128M RAM, serial port 0
+ *
+ * Copyright (c) Vijai Kumar K, 2019-2020
+ *
+ * Authors:
+ * Vijai Kumar K <vijaikumar....@gmail.com>
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2. See
+ * the COPYING file in the top-level directory.
+ */
+
+#include <jailhouse/types.h>
+#include <jailhouse/cell-config.h>
+
+struct {
+ struct jailhouse_cell_desc cell;
+ __u64 cpus[1];
+ struct jailhouse_memory mem_regions[13];
+ struct jailhouse_irqchip irqchips[1];
+ struct jailhouse_pci_device pci_devices[2];
+} __attribute__((packed)) config = {
+ .cell = {
+ .signature = JAILHOUSE_CELL_DESC_SIGNATURE,
+ .revision = JAILHOUSE_CONFIG_REVISION,
+ .name = "pine64-plus-linux-demo",
+ .flags = JAILHOUSE_CELL_PASSIVE_COMMREG |
+ JAILHOUSE_CELL_VIRTUAL_CONSOLE_PERMITTED,
+
+ .cpu_set_size = sizeof(config.cpus),
+ .num_memory_regions = ARRAY_SIZE(config.mem_regions),
+ .num_irqchips = ARRAY_SIZE(config.irqchips),
+ .num_pci_devices = ARRAY_SIZE(config.pci_devices),
+
+ .vpci_irq_base = 123,
+
+ .console = {
+ .address = 0x01c28000,
+ .type = JAILHOUSE_CON_TYPE_8250,
+ .flags = JAILHOUSE_CON_ACCESS_MMIO |
+ JAILHOUSE_CON_REGDIST_4,
+ },
+ },
+
+ .cpus = {
+ 0xc,
+ },
+
+ .mem_regions = {
+ /* IVSHMEM shared memory regions for 00:00.0 (demo) */
+ /* State Table */ {
+ .phys_start = 0xbbef1000,
+ .virt_start = 0xbbef1000,
+ .size = 0x1000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_ROOTSHARED,
+ },
+ /* Read/Write Section */ {
+ .phys_start = 0xbbef2000,
+ .virt_start = 0xbbef2000,
+ .size = 0x9000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_ROOTSHARED,
+ },
+ /* Output (peer 0) */ {
+ .phys_start = 0xbbefb000,
+ .virt_start = 0xbbefb000,
+ .size = 0x2000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_ROOTSHARED,
+ },
+ /* Output (peer 1) */ {
+ .phys_start = 0xbbefd000,
+ .virt_start = 0xbbefd000,
+ .size = 0x2000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_ROOTSHARED,
+ },
+ /* Output (peer 2) */ {
+ .phys_start = 0xbbeff000,
+ .virt_start = 0xbbeff000,
+ .size = 0x2000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_ROOTSHARED,
+ },
+ /* IVSHMEM shared memory region */
+ JAILHOUSE_SHMEM_NET_REGIONS(0xbbf01000, 1),
+ /* UART 0-3 */ {
+ .phys_start = 0x01c28000,
+ .virt_start = 0x01c28000,
+ .size = 0x1000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_IO | JAILHOUSE_MEM_ROOTSHARED,
+ },
+ /* RAM */ {
+ .phys_start = 0xbb900000,
+ .virt_start = 0,
+ .size = 0x10000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_LOADABLE,
+ },
+ /* RAM */ {
+ .phys_start = 0xb0000000,
+ .virt_start = 0xb0000000,
+ .size = 0x8000000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA |
+ JAILHOUSE_MEM_LOADABLE,
+ },
+ /* communication region */ {
+ .virt_start = 0x80000000,
+ .size = 0x00001000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+ JAILHOUSE_MEM_COMM_REGION,
+ },
+ },
+
+ .irqchips = {
+ /* GIC */ {
+ .address = 0x01c81000,
+ .pin_base = 32,
+ .pin_bitmap = {
+ 1 << (32-32), 0, 0, (1 << (155-128)) | (1 << (156-128)),
+ },
+ },
+ },
+
+ .pci_devices = {
+ { /* IVSHMEM 00:00.0 (demo) */
+ .type = JAILHOUSE_PCI_TYPE_IVSHMEM,
+ .bdf = 0 << 3,
+ .bar_mask = JAILHOUSE_IVSHMEM_BAR_MASK_INTX,
+ .shmem_regions_start = 0,
+ .shmem_dev_id = 2,
+ .shmem_peers = 3,
+ .shmem_protocol = JAILHOUSE_SHMEM_PROTO_UNDEFINED,
+ },
+ /* IVSHMEM 00:01.0 (networking) */ {
+ .type = JAILHOUSE_PCI_TYPE_IVSHMEM,
+ .bdf = 1 << 3,
+ .bar_mask = JAILHOUSE_IVSHMEM_BAR_MASK_INTX,
+ .shmem_regions_start = 5,
+ .shmem_dev_id = 1,

Jan Kiszka

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Feb 13, 2020, 9:37:16 AM2/13/20
to Vijai Kumar K, jailho...@googlegroups.com
Thanks, all 3 applied to next.
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