Cross compiling is supported by isar for a long time, and nowadays also
is the default. Recipes that explicitly don't support cross compilation
are already annotated.
By that, we switch all targets in CI to cross compilation and rename the
now-misleading NoCross test to AllTargets. This gives a massive speedup
on the full CI run, as also the kernels are not compiled via emulation
anymore.
testsuite/citest.py | 34 +++++++++++++++++-----------------
1 file changed, 17 insertions(+), 17 deletions(-)
diff --git a/testsuite/citest.py b/testsuite/citest.py
index 211bc16d..2ba7962b 100644
--- a/testsuite/citest.py
+++ b/testsuite/citest.py
@@ -202,7 +202,7 @@ class ReproTest(CIBaseTest):
self.init()
try:
- self.perform_repro_test(targets, cross=False)
+ self.perform_repro_test(targets)
finally:
self.move_in_build_dir('tmp', 'tmp_repro_unsigned')
@@ -437,7 +437,7 @@ class CrossTest(CIBaseTest):
]
self.init()
- self.perform_build_test(targets, cross=False)
+ self.perform_build_test(targets)
def test_cross_kselftest(self):
targets = [
@@ -910,15 +910,15 @@ class DtbDeployTest(CIBaseTest):
self.move_in_build_dir('tmp', 'tmp_dtbdeploy')
-class NoCrossTest(CIBaseTest):
+class AllTargetsTest(CIBaseTest):
"""
- Start non-cross build for the defined set of configurations
+ Build all defined targets
- :avocado: tags=nocross,full
+ :avocado: tags=alltargets,full
"""
- def test_nocross(self):
+ def test_all_targets(self):
targets = [
'mc:qemuarm-buster:isar-image-ci',
'mc:qemuarm-bullseye:isar-image-base',
@@ -964,7 +964,7 @@ class NoCrossTest(CIBaseTest):
targets.append('mc:qemumipsel-bullseye:isar-image-base')
self.init()
- self.perform_build_test(targets, cross=False)
+ self.perform_build_test(targets)
def test_run_arm_bullseye(self):
"""
@@ -1234,7 +1234,7 @@ class NoCrossTest(CIBaseTest):
self.vm_start('amd64-iso', 'bookworm', image='isar-image-ci',
script='test_system_running.sh 30')
- def test_nocross_debsrc(self):
+ def test_debsrc(self):
targets = [
'mc:qemuarm-bookworm:isar-image-ci',
'mc:stm32mp15x-bullseye:isar-image-base',
@@ -1242,7 +1242,7 @@ class NoCrossTest(CIBaseTest):
]
self.init()
- self.perform_build_test(targets, cross=False, debsrc_cache=True)
+ self.perform_build_test(targets, debsrc_cache=True)
def test_run_arm_bookworm(self):
"""
@@ -1251,7 +1251,7 @@ class NoCrossTest(CIBaseTest):
self.init()
self.vm_start('arm', 'bookworm', image='isar-image-ci')
- def test_nocross_rpi(self):
+ def test_rpi(self):
targets = [
'mc:rpi-arm-bullseye:isar-image-base',
'mc:rpi-arm-trixie:isar-image-base',
@@ -1264,27 +1264,27 @@ class NoCrossTest(CIBaseTest):
]
self.init()
- self.perform_build_test(targets, cross=False)
+ self.perform_build_test(targets)
- def test_nocross_rpi_debsrc(self):
+ def test_rpi_debsrc(self):
targets = [
'mc:rpi-arm-bookworm:isar-image-base',
'mc:rpi-arm-v7l-bookworm:isar-image-base',
]
self.init()
- self.perform_build_test(targets, cross=False, debsrc_cache=True)
+ self.perform_build_test(targets, debsrc_cache=True)
- def test_nocross_riscv_trixie(self):
+ def test_riscv_trixie(self):
targets = [
'mc:sifive-fu540-trixie:isar-image-base',
'mc:starfive-visionfive2-trixie:isar-image-base',
]
self.init()
- self.perform_build_test(targets, cross=False)
+ self.perform_build_test(targets)
- def test_nocross_sid(self):
+ def test_sid(self):
targets = [
'mc:qemuamd64-sid:isar-image-base',
'mc:qemuarm64-sid:isar-image-base',
@@ -1292,7 +1292,7 @@ class NoCrossTest(CIBaseTest):
self.init()
try:
- self.perform_build_test(targets, cross=False)
+ self.perform_build_test(targets)
except exceptions.TestFail:
self.cancel('KFAIL')
--
2.55.0