Wide bandwidth reception?

[Sebastien F4GRX]

Hello,

We would like to use a hermes-lite to study a signal in the HF band:
Like, NFC signals.

However, this signal is an AM / PM modulation with a bandwidth that is
not compatible with the usual settigs available in the v1 or v2
protocols: PM have sidebands at 848 kHz from the carrier.

Would it still be possible to have a single, wide bandwidth receiver,
modulo a slight abuse of the ethernet protocol?

4 Msa/s would be enough, and compatibility with usual HAM tools is not
required, since we are able to get data at the ethernet level protocol
ourselves.

The bandscope is not an option since we need all the samples with no gap.

I know this is a "VHDL exercice left to the reader"-easy kind of thing,
but we are absolute noobs at hardware description languages!

Would that feature be interesting enough so one of you could add this to
the current firmware? or, as a dedicated WB-single-rx firmware?


Thank you,

Sebastien F4GRX

[ron.ni...@gmail.com]

You might be able to resynthesize a wider band IQ signal by combining multiple slices in the frequency domain and doing an IFFT, since you know the 2 slices are constructed from the same set of ADC direct samples.  You might have to overlap the slices to avoid the edges of the gateware's anti-aliasing filters.

73,

Ron

n6ywu

[si...@sdr-radio.com]

Sebastian,

Why use a HL2? Why not use a receiver which already supports this bandwidth? Off the top of my head: Perseus, NetSDR, ELAD S2/S3, RX888 and no doubt others

Simon Brown, G4ELI
https://www.sdr-radio.com

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[Steve Haynal]

Hi Sebastian,

I've wanted to "extend" protocol 1 to support wider bandwidths for some time now. There are two reasons why this is not currently easy. First, since TX is fixed at 48kHz, I've always wanted to stay with 48, 48*2, 48*4, 48*16, 48*32 and so on. This is not easy to do with the current sampling rate of 76.8MHz where we have two factors of 5 and a final decimate-by-8 polyphase FIR filter. 76.8MHz/5/5/8 =  384kHz. The "5s" have to be integers, not fractions. It would be possible to do something a bit odd like a 76.8MHz/2/5/8=960kHz. Second, the final decimate-by-8 polyphase is quite long with ~950 coefficients. It currently limits maximum bandwidth to about 600kHz. A new FIR filter would need to be written (or borrowed from openhpsdr 2) but that is significant work.

If you are willing to work with CIC only and no FIR filters (like the 10RX gateware) and at some rate 76.8MHz/N/M like 76.8/4/4 = 4.8MHz, then I can quickly build a receive only variant for you. Note that one receiver at this bandwidth will require ~250Mbs of network.

73,

Steve

kf7o

[Sebastien F4GRX]

Hello,

I will offer a simple list of reasons :

-I have a HL2

-I dont have budget for something else

-I think the gigabit HL2 can do it

-It's a reliable SDR board

-I think it could interest more people than me

-We need to use our own software and not HDSDR or other traffic receiver

-And it would have been a great opportunity to demonstrate a scientific
use of the HL2.


Sure, we can try to "stitch" receivers but that's a bit more RF
knowledge that we dont really have. Also because of filters as
described, we are not sure the recovered signal is realistic enough for
our purposes.


We also have a RTLSDR. A "V3" key can be tuned in HF, but the usb link
is not reliable enough to give a 3Msps link.

We also have a picoscope, but the acquisition time is limited and we
would have to develop a dedicated source module for gnuradio.


Sebastien

[Sebastien F4GRX]

Hello steve,

Thanks for the explanations, I now understand how hard it is to improve the bandwidth with correct reception quality.

What are the implications of CIC only and no FIR filters?

Our experiment is digital reception, we're looking at strong signals from an inductively coupled loop antenna.

Our goal is very similar to this: http://ali.mansour.free.fr/PDF/ApplePies_2016.pdf

Except there's no eavesdropping involved, just testing of reader-card communication.

This paper shows only the analog details (and partially) while we would like to go a bit farther and automate the decoding of data, possibly as a contribution to gr-nfc .

We need two things:

-detect field amplitude

-demodulate a 848 kHz subcarrier

All of this at 13.56 MHz plus or minus the tolerance of various xtals.

Figure 1 of the paper is a representative signal.

I'll talk to my colleague to decide if 2.4 MHz is enough (that would be an interesting reduction of network usage).

Sebastien

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[si...@sdr-radio.com]

OK,

I do understand. The HL2 is a very remarkable SDR, my goal for 2022 is to get back on CW with the new CW keyer.

[radi...@mail.com]

Simon, you've already made SDR Console extremely good for CW with HL2 unless you are waiting for remote operation of course with the new keyer. Local works beautifully in SDRC right now. Use it nearly every day!

73

Max

[Steve Haynal]

Hi Sebastien,

The HL2 uses CIC filters for decimation. They are an inexpensive filter without a sharp cutoff. They are used when you will/can throw away a lot of the spectrum at the edges and only care about what is near your center target frequency. Below is a picture of RX with one 10RX receiver with only CIC filters. You can see the not flat response curve of the filter. Imagine if that response curve is folded back towards the center from each side as indicated by the red arrows. The portion of the CIC filter that is usable is near the center where the response is pretty flat and the aliasing on each edge is attenuated enough. The HL2 currently uses the center 1/8th when applying a FIR filter. I think protocol 2 uses more, maybe 1/2 with CIC sharpening in the FIR filter. I estimate that only 70 to 80 kHz centered is usable of the 192kHz from each receiver in the 10RX CIC-only gateware. This is a little less than half. If you need to demodulate ~850kHz, then you should have at least 2MHz with CIC-only. You can apply a FIR filter in software to clean it up.

73,

Steve

kf7o

    

[Sebastien F4GRX]

Hi Steve,

I really appreciate your interest and support, thank you.

CIC filtering sounds OK, 2 MHz are enough for our work.

If this is easy enough to implement for you, I could try to use this receiver.

I can make no promise of deadline for the use of this work, since it's a professional but secondary project, and I cant dedicate my full time on this.

However, if you make this wide gateware available, I will be able to use it as soon as I can.

I guess I would keep the ethernet upgrade ability?

A first attempt would be to test reception without dropped samples with a test program, and then observe the required CPU load, so we can determine how much additional processing is possible in realtime.

Thank you,

Sebastien

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[James Ahlstrom]

Hello Steve and Group,

My HiQSDR software has a CIC filter written in Verilog that can decimate by any integer from 2 to 40. The decimation is set by a 6-bit input. It is CicVarDecimM5() in file cicfilt.v. I can send it to you if it helps. The other filter in the same file CicDecimM5() has a parameter for decimation. There is also an 8x fir filter with variable taps in firfilt.v.

At 78600 kHz clock, the 8x fir filter results in a 9600 kHz rate. So maybe 76800/2/8. I don't think it is important to have the final sample rate be a multiple of 48 kHz unless you want to play the result of demodulation on a sound card.

Jim

N2ADR

[James Ahlstrom]

Hello Steve and Group,

I should also mention that the HiQSDR uses a 122.88 MHz clock and the filters can operate at 122880/8/2/8 = 960 kHz output sample rate.

Jim

N2ADR

[Steve Haynal]

Hi Sebastian, Jim and Group,

Okay. I will build a test gateware for your problem and also another one for the ethernet problem. I may not get around to doing that until this weekend.

Jim, the HL2 also has configurable CIC filters, but I always enjoy looking at various open source Verilog filter implementations. I'd appreciate a pointer to your HiQSDR RTL.

73,

Steve

kf7o

[James Ahlstrom]

Hello Steve,

I just sent them by email.

Jim

N2ADR

[Steve Haynal]

Thanks!

[Steve Haynal]

Hi Sebastien,

There is a CIC-only receive-only gateware with 2.4MHz bandwidth here:

https://github.com/softerhardware/Hermes-Lite2/tree/master/gateware/bitfiles/testing/20211212_74p0

I haven't tested it so please let me know if you notice anything unusual. You will probably have to disable the watchdog to use it as no software sends TX packets at the right ratio. An example of how to do that is in hermeslite.py:

https://github.com/softerhardware/Hermes-Lite2/blob/master/software/ft8/rx4000.py

The start radio command starts with watchdog disabled:

    ## Start radio
    self.sock.sendto(bytes([0xef,0xfe,0x04,0x81]+([0x0]*60)), (self.ip,1024))

This gateware is a modified version of the 10 192kHz CIC receiver but for 2.4MHz bandwidth. Using all 10 receivers will exceed the gigabit bandwidth, but it would be an interesting experiment to see how many receivers can run reliably. We are not using jumbo packets and would need to for highest bandwidth.

73,

Steve

kf7o

[Sebastien F4GRX]

Hello,

Thanks a lot for this code, thats really appreciated. I will test it as soon as possible.

I suppose it is not supported by usual receiver so I should use it with our own code only?

Thanks again,

Sebastien

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[Steve Haynal]

Yes, no receiver I know of besides the simple receiver.py I pointed to you will work with this gateware. You will have to use your own code.

73,

Steve

kf7o