Icezum Alhambra ADC

[KaiB]

Hey Community,

I´m a student from Germany and I don´t speak the best spanish. Maybe there is a similar topic in this group but i don´t understand the most of it. Since a few days I work with the Icezum Alhambra Board and Icestudio and I have implemented a few things. But now I don´t find a solution to use the ADC on the Board. Do I have to communicate with the ADC by I2C? Is there any example on the internet? Or has anyone of you an idea? It doesn´t have solved in icestudio, if anyone solved it in apio, i would take the verilog code too.

Hope that someone can help me..

Best regards, 

Kai B

[Carlos 47]

Hi Kai,

Yes you have to communicate with the ADC via I2C protocol (with the IceZUM board being the master), i don't have the IceZUM board but you can check the schematics here.

I'm not aware of any example about this on iceStudio or in this group but you can find verilog implementations of the I2C Master online.

Hope this help you to get started.

Carlos

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[Juan Gonzalez Gomez]

Hi Kai!

That is something that is still pending to test.  We have develop uarts, pwm units, servo controllers, but not the I2C controller for the ADC.   It shouldn't be so difficult, but I still have not found time for that

Best regards, Juan

--

[Jose Pico]

Hi!

Perhaps you can use the code in verilog used in https://github.com/AdriaanSwan/Verilog-I2C-Slave for create your I2C Slave and then to use the Master circuit of the Icezum Alhambra.

I don't tried but you can be the first...

Good luck!

[Jose Pico]

Hi again!

You can visit http://www.fpga4fun.com/I2C_2.html 

but I find a problem;

  If you try create a block Code at Icestudio I don't Know how to implement one  port of type "inout"

  and it's necessary on port inout for implement SDA in a I2c.

Best regards and good luck!

[una...@gmail.com]

Hi Kai, and welcome,

Do you have any background on I2C communication and/or Hardware Description Languages? If so, you'll find the document named "TN1274: iCE40 I2C and SPI Hardened IP Usage Guide" to be rather interesting. You can download it, along with multiple verilog examples at: http://www.latticesemi.com/Products/FPGAandCPLD/iCE40.aspx Jump to section/tab "Reference Designs", and this is what you'll find:

		I2C Master Controller Documentation	RD1139	1.1	2/12/2015	PDF	1.5 MB
		I2C Master Controller Source Code	RD1139	1.1	2/12/2015	ZIP	658 KB
		I2C Slave Controller - Documentation	RD1140	1.1	2/12/2015	PDF	746.4 KB
		I2C Slave Controller - Source Code	RD1140	1.1	2/12/2015	ZIP	338.6 KB
		I2C to SPI Bridge - Documentation	RD1172	1.1	2/9/2015	PDF	1.4 MB
		I2C to SPI Bridge - Source Code	RD1172	1.1	2/8/2015	ZIP	459.7 KB

		SPI to I2C Bridge - Documentation	RD1173	1.1	2/9/2015	PDF	1.5 MB
		SPI to I2C Bridge - Source Code	RD1173	1.1	2/8/2015	ZIP	611.7 KB

Just pick your favourite approach!

Note that iCE40 FPGAs include hardened IP-cores. That is, you don't have to implement the controller, but to interact with it. However, you can implement a full SPI-master module in Verilog if you feel like doing it.

On top of the resources above, you'll need the datasheet of the specific ADC part you are interfacing, in order to check the proper command sequence. Carlos pointed you to the schematics, so that you can know which pins are being used.

Please do not hesitate to ask in english, even in threads you didn't open. Some of us are quite used to multi-language conversations. I don't know german, though :S.

Kind regards

[Andrés Prieto-Moreno]

Hi Kai,

I was asking the same question the other day. There is no support for the ADC in ICEStudio yet... things are going fast but hasn't been implemented yet.

So, in order to make the ADC to work you need to make or run an I2C core for the Alhambra. I am interested on that too, so perhaps this is a good place to start sharing ideas. 

Regards,

Andres

[Juan Gonzalez Gomez]

Hi!

For implementing inout ports you have to use the SB_IO component. Salvador tropea packaged it in icestudio. You have access to the component in the config/Tri-state menu

Best regards, Juan

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[kaib...@googlemail.com]

Thanks for the information. Yes i have some background on I2C communication and Hardware Description Languages but I think both of it not as much as i needs for this.. I worked only with I2C in combination with Mikrocontrollers and the Hardware Description Language I learned is VDHL and this for only one semester in my University.. I have create an account on the website you recommend and wait now for the confirmation mail. If i make any progress, i will let you know

[una...@gmail.com]

Good morning!

El jueves, 16 de marzo de 2017, 10:16:58 (UTC+1), kaib...@googlemail.com escribió:

Thanks for the information. Yes i have some background on I2C communication and Hardware Description Languages but I think both of it not as much as i needs for this.. I worked only with I2C in combination with Mikrocontrollers and the Hardware Description Language I learned is VDHL and this for only one semester in my University..

Then, I'm sure that you will be able to achieve it ;). I've been working with VHDL for five years now, so I can help you with that. I mean specific syntax and coding issues.

However, I have never used any I2C device. Neither have I used the specific ADC part which comes in the Alhambra. Therefore, I'd need some reference about which specific commands should be issued, and which is the expected timing. With that, and the I2C Master Controller Documentation (RD1139) document, linked above, the solution should be straightforward. The interface is pretty similar to what you are used to with microncontrollers:

i_clk	1	Input	System clock operating at 32 MHz
i_rst_n	1	Input	Asynchronous active-low system reset
o_int_n	1	Output	Active-low processor interrupt
i_slave_addr_reg 8	Input	7-bit I2C slave address
i_byte_cnt_reg 8	Input	Sets the number of data bytes to be read or written for the I tion 2C transac
i_clk_div_lsb 8	Input	Sets the lower byte of the clock divider that is used to generate SCL from CLK. The upper three bits are located in the mode register.
i_config_reg	6	Input	Used to configure the I2C Master Controller (see Table 1)
i_mode_reg 8	Input	Sets the various modes of operation like speed, read/write (see Table 1)
o_cmd_status_reg	8	Output	Lets the user know the status of the operation, I2C bus (see Table 1)
o_start_ack	1	Output	Acknowledge to the start bit provided by the user through i_config_reg
i_transmit_data	8	Input	Data to be transmitted over the SDA line to the I2C slave
o_transmit_data_requested	1	Output	Lets the user know that transmit data is required
o_received_data_valid	1	Output	A ‘1’ corresponds to valid data availability on the o_receive_data line
o_receive_data	8	Output	Received data bus
io_scl 1	Inout	I2C clock line
io_sda 1	Inout	I2C data line

Note that I am not asking you to do anything. Just letting you know which my approach will be when I have enough time to test it. I believe this is much easier than actually implementing an I2C master, as others proposed. However, this approach is specific to iCE40 devices (such as those in the Alhambra and icestick boards).
 

I have create an account on the website you recommend and wait now for the confirmation mail. If i make any progress, i will let you know

I think that it is not necessary for you to sign in, in order to download those resources. I just clicked in the links below and I could download any of them. Can't you?

[Jesús Arroyo]

Hi Kai B,

Matthew Venn created a cool project using the iCEstick board and the Icestorm tools. He implemented an I2C design. Here is the thread and the project.

It may be useful for you.

Regards.

El jueves, 16 de marzo de 2017, 10:16:58 (UTC+1), kaib...@googlemail.com escribió:

[kaib...@googlemail.com]

Hi guys,

I have now implemented the I2C with the help of Jesús Arroyo. I builded a status maschine to communicate with the I2C_master file. Now I have signals in the oscilloscope but the slave does not send the bit ACK .. for the tests I use the MPU-6050. The device has the address 1101000 if I wire the AD0 with the GND pin.

Have anyone an idea what is wrong? 

I have test it with 100kHz and later with 400kHz with the same results.

Regards,

Kai

[1138-4EB]

Hi Kai, and congrats!

Could you, please, post the following info so that we can have a better picture of the experiment:

• What signals are connected to which pins on the FPGA and on the MPU-6050.
• Where are measures taken from. Just the FPGA pins, the MPU pins or somewhere in between?
  
• Which of the signals in the oscilloscope corresponds to the clock signal and which to the data.
• I suppose that SCL is the blue one. Then, why is it not periodic?
• In which part of the graph is the FPGA sending data and when does it wait for the response.
• Which commands you are actually sending. I can identify 1101000 in the yellow trace, but not the following one.

Regards

PS: did you try the ADC first or are you going directly for the MPU?

[kaib...@googlemail.com]

Hey,

ok I choosed the two I2C pins from the IceZum Alhambra board SCL and SDA. They are referenced as 87 and 88 in the pcf file. They are wired to the SDA and SCL from the MPU. The VCC is connected with the 3.3V pin and GND with GND. The AD0 pin of the MPU is, how i mentioned before, wired to GND. The measure taken from a breadboard where the mpu is connected. Additionaly I measured at the MPU direktly. Yes the SCL is the blue one and the SDA the yellow one. The first delay from SCL is the Stop of the last and the Start of the next package. Then come the 7bit adress, the w/r bit (0=write) and at last the high impedance to allow the slave to set the ACK bit (ACK = 0). The next package is the address of register which I want to read but I think it doesn´t matter because the slave hasn´t set the ACK bit.. 

I flash the IceZum Alhambra board with the IDE ATOM/ Apio and there was a warning that yosys doesn´t support tristate buffer.. Maybe that is the failure? In the i2c_master code is it written as: assign i2c_sda = (i2c_sda_tri == 1) ? 'bz : 0; 
Thats right but I don´t know if it is really tristate.. Is there any way to test it on the circuit? Or is there another failure that I haven´t seen yet?

Regards,

Kai

[kaib...@googlemail.com]

I went directly to the MPU and if it is working, I work with the ADC.

[1138-4EB]

Hi Kai,

Thanks a lot for the info. It is much clearer for me now. However, I have a deadline this night, so I won't have enough time today to have a thoughtful look at it. Anyway, here is a fast tip:

It seems that you didn't put any resistor between the pins in the IceZum and the MPU. It is definitely recommended, as it avoids shortcouts. This is not critical in the current setup, because you have a single master in the bus. Moreover, it will be useful to check the doubt you have about the output being tristate:

• Connect the SDA pin from the FPGA, through a resistor to either VCC (3,3V) or GND. Leave the MPU unconnected.
• Execute the FPGA and check the voltage in its SDA pin when it is expected to be high impedance. If it matches the other side of the resistor, it is correct. If not, it is still configured as an output.
• Since the FPGA may drive the output high or low, you can repeat the test changing the resistor from pull-up to pull-down or vice versa.
  

On top of that, I suppose you made it work with an Arduino or any other microcontroller before. If so, could you check the trace and compare it to the one you get from the FPGA? That would discard any MPU malfunction.

Regards

[kaib...@googlemail.com]

Ok it works! The most significant failure was that the SDA and SCL wire changed on the same time. I don´t know why I don´t recognized it before. And because of the Tristate-pin I instantiate the SDA pin with:

module inst (

 inout pin,

 input oe,

 input din,

 output dout

);

   SB_IO #(

       .PIN_TYPE(6'b1010_01),

       .PULLUP(1'b0)

   ) triState (

       .PACKAGE_PIN(pin),

       .OUTPUT_ENABLE(!oe),

       .D_OUT_0(din),

       .D_IN_0(dout)

   );

endmodule

Thanks for the help of everyone here! :)

[1138-4EB]

Happy to hear that. Congratulations!

[Andrés Prieto-Moreno]

Amazing !!!!!

I was going to ask you about this today!! I finished the stepper motor app and was going to start looking into this.

And now is going to be much more simple, not sure if the code you made is in one of this posts... I will take a look this afternoon.

But this is really cool.

Is wasn't clear for me if you were able to connect not only the the MPU but also to the Alhambra's ADC? can you (or some else) confirm that Alhambra's ADC has been tested?

If not I am willing to do it.

Thanks !!

[kaib...@googlemail.com]

Sorry for the late reply but I was a bit busy the last days.

I changed to the adc directly.. The MPU had some problems even with the Arduino.. 

Here is my Code:

https://github.com/kaibran/printbot

The ADC1 port works well but I can not read another port. Don't know why but I will work on it the next days. Maybe you find my mistake or a solution.

Regards,

Kai

[Juan Gonzalez Gomez]

Amazing!!!!!  I will try your code. Thanks for sharing!  :-)

Best regards, Obijuan

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[kaib...@googlemail.com]

No Problem. But how I mentioned are there a few errors in the code. For example, sometimes the SCL is working incorrectly. This is the result of the Oscilloscope.:

 It seems that the SCL do not save the signal during one clk_i2c cycle.. I think that it is a simple error but I don't find it.

[Andrés Prieto-Moreno]

Wow !!! 

So exicted, even if has errors , this is a great work. I have been also busy but i will give a try this night.

Thanks for sharing!!

[Andrés Prieto-Moreno]

Hi Kai,

I have been looking to the code and I have a couple of doubts. I don't know anything of Verilog, so perhaps my questions wont have any sense, but just in case:

- I don't understand how you read and write through the same pin.  I have seen i2c_sda_in, i2c_sda ... are you managing this with i2c_sda_tri? .. not sure but I wasn't able to follow the code.. I am missing how are you using i2c_sda.

- In the ACK section , are you expecting the SLAVE to start a communication with you? I mean, I was expecting the MATER to be the receiver of the ACKs even when getting the data.

Have you been able to add your block into the IceStudio? 

Thank you in advance.

Regards,

Andres

[kaib...@googlemail.com]

Because of the SDA line:

I declare the SDA pin as an inout and instantiate it in the instantiate.v file called from i2c_master. There is a code block how you implement such a Pin which must be read and write (previously I had done it with an if else structure where the else case was 'bz, but then was there an error because yosys doesn't support tristate).

I don't understand your question with the ACK but after the master sends the address, the corresponding slave answered with an acknowledge. If you read, the master must send the ACK to tell the slave that he must send one more byte and if you write, the slave must do the ACK. With this ACK the slave tells the master that he has some more bytes to send.

So far I had not implemented it in IceStudio yet but I will do it if it is working stable. I thing that it will not be a problem.

Regards 

Kai

[Andrés Prieto-Moreno]

Hi,

The ACK questions was due to my device doesn't send (write) more than a byte, so in the manual didn't mentioned the master ACK... 

Thanks for the answer.

[mohamed....@gmail.com]

Hi Kaib

I am facing the same issue and I am trying to find out how to did succeed with this tristate component.

This means you are not using the tristate component from icestudio but designing your own one with your own code. Don't you?