Memory block data width

[Nigel Smith]

Is it possible to specify the width of the data in the memory block?

In my design, the memory block works perfectly if I assume 8-bit data, but doesn't work if I enter 3-bit data. Icestudio doesn't complain: it verifies, builds and uploads fine, but whereas a value of 06 or 0x06 works fine, a value of 3'b110 does not.

I'm not asking for a change to the block, just for a clarification about how it behaves. (But it would be a good idea to add this to the block description if, indeed, data must be 8 bits wide.)

By the way, I thought I would be able to enter the block and modify its Verilog code to do what I want, but with this block it's not possible.

Nigel

[Democrito]

I think that the data entered into the memory box should always be in hexadecimal, without the "0x", that is, directly numbers from '0' to '9' and letters from 'A' to 'F'.

What you can specify is the memory address as decimal, hexadecimal or binary. (Image below)

Example of content within memory:

If you want an example of a memory that is 3 bits wide, and for example addressable up to 256 positions, tell me and I will give you an example.

[Democrito]

Attached is an example block of RAM (will be inferred as BRAM) with 3 data bits, addressable in 256 positions. Double-click the module to see the verilog code it contains.

If you later want to modify that module, clone it first:

control+C and then control+shift+V

If you modify the inside of a module without cloning it first, you can create future problems, especially in your collections.

Using this as an example, if you always keep "wr" at 0, it will behave like a ROM.

To save data to memory, first enter the address and data, and then give a tick (a single clock cycle) to the "wr" pin.

[Nigel Smith]

Thanks, I'll use this for now.

It's still not clear to me which formats may be used for the data in the memory block. This is not explicitly stated in the block description, but the accompanying images imply that data can at least be either hex or binary. It would good to clarify this and update the block description accordingly.

[Nigel Smith]

Is it still possible to use an external file to contain the contents of a memory block, or was this feature removed when it was made possible to enter data directly into a memory block?
I want to use an character ROM contained in an external file, but I can't figure out how to add a memory block that references "file.list"

[charli va]

Hi Nigel! tu use an external file to load the initial memory content you should:

1) Create a file with the memory dump in the same directory that your .ice file (for the moment should to be in the same place).

2) Create a memory block in Icestudio and in the first line put between " the name of the file

3) For the moment the file should have .list extension

I hope should be useful

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[charli va]

I forget:

The content of the file should be in hexadecimal and you could put comments inside, for example:

//-- This is a comment and here start the 0 address with the content
A0
4E
FF
FA

[Nigel Smith]

I had already tried what you said and it didn't work, but my file was in binary :-) I'll try hex.

[charli va]

If you want to  load hex file, you could use verilog, view the example i sent in previous email for PLLs, vga example and in the code block the verilog reads a rom with the fonts in binary, it's very easy, check this example if you want (in this example, view that you should put at the top of the verilog block a comment with a reference to the file.

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[Democrito]

To invoke the file you have to use a constant frame, if you use a memory frame it will not work. I attach a simple example.

The file must always end in ".list". Any other extension will not work.

In the example I attached, you will see a binary count from 1 to 7 on the LEDs and then count down. This repeats indefinitely.

[Democrito]

Where I put "constant frame" I meant "constant box"

[charli va]

Thanks Democrito! I'm struggling with development and I responded quickly and I was wrong. Thanks again!

El jue, 16 nov 2023 a las 18:20, Democrito (<spo...@gmail.com>) escribió:

Where I put "constant frame" I meant "constant box"

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[Democrito]

I know! And I know you have a lot of work!

[charli va]

Thank goodness I have you as my guardian angel! Thanks again!

El jue, 16 nov 2023 a las 18:33, Democrito (<spo...@gmail.com>) escribió:

I know! And I know you have a lot of work!

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[Nigel Smith]

Finally I made some progress. The first problem was that I was using a memory block to specify the filename instead of a constant block.

The second problem is that Icestudio appears to expect 0x0d and 0x0a as line delimiters whereas TextEdit in the Mac only inserts 0a.

I need to convert my binary character ROM to an ASCII equivalent tomorrow, but at least I know it works in principle...

[charli va]

Great Nigel!! if you want to share with us your design, count with us!

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[charli va]

Hi Nigel! if you don't want to convert your font, you could include in your verilog video block something like this:

reg [7:0]CHROM[0:1535];

initial $readmemh("fontD7x12.list",CHROM);

CHROM should be the memory that you use as ROM  with your apropiate dimensions.

fontD7x12.list is yor binary file but change your extension for .list

At the top of the block you need to put the line:

// @include fontD7x12.list

with the name of your file.

And this file should be in the same directory than .ice file

With this verilog code yo don't need to convert your font file.

[Nigel Smith]

Good morning Charlis,

We need to be precise in our language here. I think when you talk about "binary" and "hex" files, in both cases you are talking about a text file containing ASCII characters that represent the binary or hex values, correct? When I talked about "binary" files, I was talking about true binary values, not ASCII characters. This confused me for some time. Reading the Verilog documentation, it doesn't matter whether you use readmemh or readmemb, in both cases the file is a text file. And in both cases, the file needs the line feed and carriage return characters to be correctly parsed by Verilog. There is no difference in my case if "file.list" is used as a parameter in a constant block or if it's referred to directly in the Verilog code: in both cases the format must be the same, so I still need to format my true binary (i.e. not ASCII) file format to ASCII before I can use it.

Another issue that caused me some problems is that on my Mac the OS often hides the last extension. So a file that you think is called "file.list" may actually be called "file.list.txt". So when Verilog looks for "file.list" it can't find it and generates an error. I had to use Get Info option in the Finder to disable the Hide Extension option and manually force the file extension to be just .list.

But I'm making progress and learning a lot along the way.

[charli va]

I'm so glad to read your words Nigel! The most important thing in life is to enjoy the journey :)

Thank you very much for participating with us, we learn a lot from each other and sharing these experiences is the most important thing.

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