Re: Digest for electricvlsi@googlegroups.com - 1 update in 1 topic

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Alexandre Rusev

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Sep 27, 2020, 4:50:57 PM9/27/20
to electr...@googlegroups.com
Sorry, I don't see skywater130.xml file attached.
Could you repost it please our "special interest group"?

What about that bloody "li" that is acronym of local interconnect.
Likely it is NOT a full equavelent of "metal1".
The same story is for example with semi-obsolete ST 180nm H8 tech.
This layer would be typically made of high resistive wolfram.
It's just and extension of capabilities of "bloker" layer between "metal1" aluminium/copper and silicon, needed by technological reasons.
(aluminia crystall grought can penetrate silicone and break n+/p+ conductivety
or iven short cut gate and active througth gate oxide ...)

The use of "li" is connecting contacts to poly oar active together inside on transisor
 or likes that...  likely it's a good practice to avoid use of "li" as interconnect at all;)





On Fri, Sep 25, 2020 at 9:31 AM <electr...@googlegroups.com> wrote:
Adam Joseph <ad...@westernsemico.com>: Sep 24 02:00AM -0700

Attached is a preview of the SkyWater130 Electric Technology File (aka
PDK) and a simple demo library. It works with the unmodified
public Electric version 9.07.
 
As usual, to use the technology file, go to File -> Preferences ->
Technology -> Added Technologies -> Add, and choose the attached
skywater130.xml file. Then restart Electric, File -> Open Library and
choose the attached sk130.jelib demo library. You should be able to
open inverter{lay} and run both DRC and LVS (aka NCC). You should also
be able to import GDS files with File -> Import -> GDS Stream.
 
Please don't hand-edit the XML file, it is generated by Java code. I
will be open-sourcing the generator (Apache license), hopefully this
weekend, as soon as I purge it of anything covered by the NDAs I have
with other foundries. I will set up a git repository; once I do that
you can submit patches against that if you find bugs or want to add
features.
 
Please don't create any layouts with this technology that you aren't
prepared to throw away. I will try to stabilize it as quickly as
possible, but it isn't there yet. If I change layer names or arc
minwidths it will break your layouts.
 
Note that most contacts come in two flavors. In the screenshot below,
look at the two poly contacts in the lower right-hand corner. The one
on the right is called an "X" contact because if you tilt your head 45
degrees the layers above and below the contact form an X-shape. The
one on the left is called a "P" contact because the rectangular layers
above and below the contact are Parallel. Some contacts (like mcon)
only come in one flavor because the minimum metal enclosure either above
or below them is square. The X-contacts tend to be most useful.
You'll find that in their default (0-degree rotation) form they match
the track directions of the SkyWater130 digital cell library.
 
More to come...
 
- a
 
PS, SkyWater's naming conventions are a bit weird. "Local Interconnect"
is really "Metal 0" and "mcon" is "via0".
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Adam Joseph

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Sep 28, 2020, 3:38:35 PM9/28/20
to Alexandre Rusev, electr...@googlegroups.com

Hi Alexandre,

If the attachment didn't come through you can download it through the
google groups web interface here:

https://groups.google.com/forum/#!topic/electricvlsi/p1tZwlLYdzs

Click the link "Download" beneath "skywater130.xml".

I am working on the git repo with the generator; should be available
tomorrow.

> What about that bloody "li" that is acronym of local interconnect.
> Likely it is NOT a full equavelent of "metal1".

No, it really is the lowest metal layer. I know this is confusing.
Every other foundry with a "local interconnect" layer uses that term to
describe the ability to draw wires on the contact/via layers instead of
just square "buttons". So with every other foundry, "local
interconnect" is a special kind of layer that is ALWAYS connected to
the metal above and below it whenever those layers overlap. That's why
they give it a special name "local interconnect" instead of "metal".

SkyWater's "local interconnect" is NOT like this. It is just an
ordinary metal layer. It is quite a bit thinner than the other metal
layers, and has quite a bit higher sheet resistance, but those are the
only differences.

- a

Alexandre Rusev

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Oct 4, 2020, 8:37:58 PM10/4/20
to Adam Joseph, electr...@googlegroups.com
> No, it really is the lowest metal layer. 
Looks like I missed that just looking on their stack (https://skywater-pdk.readthedocs.io/en/latest/_images/metal_stack.svg), sorry.

Testing it!

Still I see errors when trying to use the SkyWater tech desc:


[1] I see it in "Added technologies" accordingly you readme (https://gitlab.com/westernsemico/com.westernsemico.vlsi) thought I can't select this technology later in components tab.
May be I am just doing something wrong with tech desc imported from XML???

[2]  the library sk130.jelib contains absolute paths for nonexistent (and unused by SkyWater) libraries. And errors related to missed layers are reported ...


This is wat is found inside library:
# Tools:
Ouser|DefaultTechnology()Stsmc28|SchematicTechnology()Stsmc28|SoftTechnologies()S/home/user/proj/wcc-electric/lib/tech/st65/st_old65.xml;/home/user/proj/wcc-electric/lib/tech/lf150/lf150.xml;/home/user/proj/wcc-electric/lib/tech/tsmc40/tsmcSun40GP.xml;/home/user/proj/wcc-electric/lib/tech/tsmc180/tsmc180.xml;/home/user/proj/wcc-electric/lib/tech/umc65/umc65.xml;/home/user/proj/wcc-electric/lib/tech/tsmc40/tsmc40.xml;/home/user/proj/wcc-electric/lib/tech/gf28/gf28.xml;/home/user/proj/wcc-electric/lib/tech/pcboard_inches/pcboard_inches.xml;/home/user/proj/wcc-electric/lib/tech/pcboard/pcboard.xml;/home/user/proj/wcc-electric/lib/tech/lf150a/lf150a.xml;/home/user/proj/wcc-electric/lib/tech/umc180/umc180.xml;/home/user/proj/wcc-electric/lib/tech/tsmc28/tsmc28.xml;/home/user/proj/wcc-electric/lib/tech/skywater/skywater130.xml
Oio|GDSCellNameLenMax()I3000|GDSDefaultTextLayer()I0|GDSOutputConvertsBracketsInExports()BF|GDSOutputWriteExportCharacteristics()BF|GDSWritesExportPins()BT

image.png





image.png


Alexandre Rusev

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Oct 6, 2020, 8:19:23 PM10/6/20
to electr...@googlegroups.com
image.png

Now I succceed with opening library

Is it the the Layer Algoritm which helps to open library

Is it correct what I see on the picture above?

Thank you

On Tue, Oct 6, 2020 at 9:32 AM <electr...@googlegroups.com> wrote:
Adam Megacz Joseph <ad...@westernsemico.com>: Oct 05 01:26AM -0700

On Mon, 5 Oct 2020 03:37:43 +0300
> Testing it!
 
Awesome!

 
> can't select this technology later in components tab.
> May be I am just doing something wrong with tech desc imported from
> XML???
 
Okay, I think I found the problem, you need to choose "write project
settings". I have updated the instructions here; the new parts are in
BOLD, and also step #4:
 
https://gitlab.com/westernsemico/com.westernsemico.vlsi
 
Could you please try again, making sure to do the BOLD part in step
#5? Let me know if that does not work.

 
> [2] the library sk130.jelib contains absolute paths for nonexistent
> (and unused by SkyWater) libraries.
 
> Tools:Ouser.../home/user/proj/wcc-electric/lib/tech/st65/st_old65.xml...
 
Wow, that could have been embarrassing. Electric seems to have a
security issue here -- information leakage. Good thing I was not
trying to keep secret the fact that I have all these technologies.
 
This shouldn't cause you a problem, however. The file
"tsmcSun40GP.xml" is not on my computer, in fact it hasn't been on any
of my computers since I left Sun Labs several years ago. But I've been
using the same Electric preferences file since then. I also tried
opening the jelib on another computer where none of those files or
directories exist and it still worked.
 
In any case, thanks for reporting the issue.
 
- a
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