Hi
all,
Compiling Jean-Mark Valin's LPCNet code on an Odroid M1
board with
the
correct CPU switch to the C compiler, is now getting
close to where the
FreeDV
application is
usable.
The LPCNet decode process on the ARM cortex-a55 core for
a 5 second input
file
takes 5 secs to decode
it.
So, we need to split out every second OFDM received
packet and put it to a
separate
decode process thus using two CPU cores of the four cores
available in quite a
few
current ARM
SoCs.
A Codec2 repeater (as I've implemented) does not need to
decode the digital
data
in real time, so I could have a go at implementing the
2020
modes.
Here is an example of mode 700D on 18118KHz.
His voice digital data was retransmitted for him to listen too. (decoding at his end)
Just as is done with DMR, Fusion and D-Star repeaters.
0x73
Alan VK2ZIW
On Tue, 28 Feb 2023 17:24:07 +1000, Al Beard
wrote