Blog post about hashtable

[adamwa...@gmail.com]

Hi Clash people,

I've written a blog post that you might find interesting: http://adamwalker.github.io/Building-FPGA-KVS/.

Questions and comments are very welcome.

Cheers,

Adam

[Christiaan Baaij]

Hi Adam,

Great post! Really appreciate all the background detail.

One minor comments:

The type signature for cuckooPipelineInsert

It would be nice if it was formatted such that I wouldn't need horizontal scrolling when reading on a desktop (I understand this can't be avoided on mobile)

If you use (fu)ormulu style formatting this is easier to achieve:

{- |

Convenience wrapper for cuckooPipeline that checks whether keys are present

before inserting them. If found, it does a modification instead.
  

Only allows one insertion at a time so it is less efficient for inserts than `cuckooPipeline`
-}
cuckooPipelineInsert ::

    forall dom m n numRamPipes k v .

    (HiddenClockResetEnable dom, KnownNat n, Eq k, KnownNat m, NFDataX k, NFDataX v) =>

    -- | Number of ram read pipeline stages

    SNat numRamPipes ->

    -- | Hash functions for each stage             
    Vec (m + 1) (k -> Unsigned n) ->

    -- | Key to lookup, modify or insert

    Signal dom k ->

     -- | Modification. Nothing == no modification. Just Nothing == delete.

    -- Just (Just X) == insert or overwrite existing value at key         
    Signal dom (Maybe (Maybe v)) ->

     -- | (Lookup result, Combined busy signal)

    ( Signal dom (Maybe v), -- Lookup result
    , Signal dom Bool       -- Combined busy signal
    )                           

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[adamwa...@gmail.com]

Reformatted. Thanks for the suggestion!