Simulating Chisel Designs

[Hanieh]

Hi,

I have recently explored the Chipyard framework. I encountered some difficulties setting it up on Windows WSL and asked some questions in a forum, but I couldn't find the answers. Therefore, I switched to Linux, and after resolving some errors, I was finally successful. I have simulated a simple C code with a customized system configuration, and now I am exploring how to add my own accelerator design to the system.

I have both the Chisel and Verilog code and would like to investigate MMIO and RoCC methods. Specifically, I wanted to ask if it’s possible to simulate the Chisel design separately to verify its functionality before integrating it into the system. Additionally, I am curious if there is any ongoing research on using Chipyard for LLM applications.

I would appreciate any recommendations or assistance you can provide.

Best,
Hanieh

[Hanieh]

Hi everyone,

I figured out the dependent Chisel simulation process. It can be done via online platforms like Replit with your implementation and desired testbench in .scala files and a build.sbt file for handling the configuration and dependencies. I started with a basic one as follows, which can be further developed.

However,  still if anyone has experience or insights on using Chipyard for LLM applications, I would greatly appreciate your guidance. Specifically, I'm interested in understanding how Chipyard could be leveraged or modified for LLM workloads, and if there are any ongoing research projects or resources that could help me explore this further.

Best,
Hanieh

Here is my simple build.sbt file: 

scalaVersion := "2.12.13"

scalacOptions ++= Seq(
  "-deprecation",
  "-feature",
  "-unchecked",
  "-Xfatal-warnings",
  "-language:reflectiveCalls",
)

addCompilerPlugin("edu.berkeley.cs" % "chisel3-plugin" % "3.5.3" cross CrossVersion.full)
libraryDependencies += "edu.berkeley.cs" %% "chisel3" % "3.5.3"
libraryDependencies += "edu.berkeley.cs" %% "chiseltest" % "0.5.3"

[Jerry Zhao]

You can also set up standalone TestHarnesses around arbitrary Chisel modules in Chipyard. Of course, you'll have to write the test vectors in these TestHarnesses, but this is true regardless of the simulation path used.

Chipyard includes Gemmini, a machine learning accelerator implementation. You can contact the Gemmini devs and ask about the extent of LLM optimizations that have been explored in that system. Beyond that, I'm not aware of any Chipyard work for LLMs.

-Jerry

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[Karl Hallsby]

I have tried to do the same unit & integration testing myself with my research designs too. If you structure your accelerator as another generator in Chipyard and put your Scala-written scalatests/chiseltests in the Scala-expected directory (src/test/scala), you can issue a simple "sbt test" in your accelerator's submodule, and your design will be tested with chiseltest.

[Jerry Zhao]

Chiseltest has been deprecated, and will no longer be supported once we move to a pure chisel6+ world, which is happening at the moment.

SVSim is meant to replace the lost functionality in chiseltest. Unlike chiseltest, svsim is built into chisel. 

-Jerry

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[Joonho Whangbo]

Hello,


It is possible to use Chiseltest to unit test your modules before integrating it into the SoC.
I’m not very sure about using CY for LLM applications.

Joonho

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[Hanieh]

Thank you both for the detailed responses and helpful suggestions!

Jerry, I appreciate the idea of setting up standalone TestHarnesses in Chipyard for my Chisel modules. I'll explore that approach. Also, I’ll reach out to the Gemmini developers to learn more about any LLM optimizations.

Karl, thanks for sharing your method for integration testing. I’ll follow your advice and start looking into SVSim as Jerry's recommended.

Thanks again for your guidance!

Best,
Hanieh