Hi all,
This is a very exciting open source project, and I hope to contribute here some day soon!
Setup:
I am currently following the instruction on `black-parrot-sim` repository. My environment has been set up using the provided docker file, and I’m running the initial test with the following command after running `make prep_lite`:
`make -C black-parrot/bp_top/syn build.verilator sim.verilator`
Issue:
While the simulation appears to start correctly, I’m getting repeated messages like:
`TOP.testbench.wrapper.processor.u.unicore.unicore_lite.core_minimal.be.watchdog.stall_counter error: counter overflow at time 2854657000`
The same error persists and continues to accumulate, with the simulation not terminating. At first, I assumed the simulation is taking a bit long since it's a large design, but I wanted to confirm whether this is expected behavior or if there might be an issue with my setup.
I've attached the log file of the ongoing simulation. I would appreciate any guidance on whether this is supposed to happen (which I doubt :( ) or if there are any steps I should take to solve it. Thank you so much for your time!
Best,
Peter