I2S interface on BBB

[hi...@olli-ai.com]

Hi all,

I'm try to use TVL320AIC3254 Codec with Beaglebone Black via I2S bus. At present, I can play music but it hear noise. Attached is script to set up this codec with these setting: WCLK=44.1Khz, BCLK=1.4112 Mhz, MCLK=24 Mhz. I have some questions:

1, Below is my hw_params. I want to set BCLK=2,8224 Mhz for 32 bit stereo. How can I do that?

static int tlv320aic32x4_hw_params(struct snd_pcm_substream *substream,
struct snd_pcm_hw_params *params)
{
struct snd_soc_pcm_runtime *rtd = substream->private_data;
struct snd_soc_dai *codec_dai = rtd->codec_dai;
struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
struct snd_soc_card *soc_card = rtd->card;
int ret = 0;
struct platform_device *pdev = to_platform_device(soc_card->dev);
unsigned int bclk_freq = evm_get_bclk(params);
unsigned sysclk = ((struct snd_soc_card_drvdata_davinci *)
snd_soc_card_get_drvdata(soc_card))->sysclk;

printk("TLV320AIC32X4 hw params\n");
printk("sysclk=%d\n", sysclk);
printk("bclk_freq=%d\n", bclk_freq);
printk("clkdiv=%d\n", sysclk/bclk_freq);

/* set the CPU system clock */
ret = snd_soc_dai_set_sysclk(cpu_dai, 0, sysclk, SND_SOC_CLOCK_OUT);
if (ret < 0)
return ret;

/* set the codec system clock */
ret = snd_soc_dai_set_sysclk(codec_dai, 0, sysclk, SND_SOC_CLOCK_OUT);
if (ret < 0)
return ret;

return ret;
}\

2, Can I change MCLK frequences to 12 MHz while frame rate is 44,1 Khz?

[Stuart Longland]

On 07/03/18 21:52, hi...@olli-ai.com wrote:
> I'm try to use TVL320AIC3254 Codec with Beaglebone Black via I2S bus. At
> present, I can play music but it hear noise. Attached is script to set
> up this codec with these setting: WCLK=44.1Khz, BCLK=1.4112 Mhz, MCLK=24
> Mhz.

It's been a long time since I had anything to do with the TLV320AIC32x4
driver in the kernel, I actually wrote the very first open-source one
back in 2010.

Without going into detail of what settings you've selected, my first
thought would be to get the oscilloscope out and verify that the bit
patterns are what you expect.

Maybe try triggering on WCLK and monitor BCLK; you should see 32
transitions between each transition of WCLK.

Also, double check the 'AIC32x4 datasheet and the TI Sitara docs, and
make sure one end is master, the other is slave. I'd recommend the
AIC32x4 is master, since it's usually easier to set to a given sample rate.

I vaguely recall some code that would figure out what PLL settings to
use in the AIC32x4 to generate the right sample rate for the given MCLK;
but whether that's in the current driver, I cannot be certain.

Regards,
--
Stuart Longland (aka Redhatter, VK4MSL)

I haven't lost my mind...
...it's backed up on a tape somewhere.

[Yiling Cao]

By noise, do you mean analog background noise or digital related noise?

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[Stuart Longland]

On 09/03/18 05:24, Yiling Cao wrote:
> By noise, do you mean analog background noise or digital related noise?

If your BCLK and WCLK are up the spout, then the CODEC will not be
synchronised to the audio stream and you'll get something that sounds
like static instead of the intended waveform.

Take a 16-bit signed PCM stereo audio file; and try playing it as 8-bit
unsigned PCM mono, and you'll get an idea of what I'm talking about.

[Graham]

>>>  2, Can I change MCLK frequences to 12 MHz while frame rate is 44,1 Khz?

Do you really mean 12 MHz? or 24 MHz?

Normally systems running 44.1 kHz frame rates use an MCLK of 

44.1 kHz *  256 = 11.2896 MHz, or,    44.1 kHz *  512 =  22.5792 MHz

--- Graham

==