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AFAIR the PRU cannot write to PWMSS-0 SS when the tbclk isn't enabled.
I had also the idea to enable clock for PWMSS2 via enabling control module bit.But writing to "pwmss_ctrl Register" 0x44E10664 didn't change behaviour.
Maybe I have to write also to "CM_PER_EPWMSS2_CLKCTRL Register" at 0x44E000D8?
I said:AFAIR the PRU cannot write to PWMSS-0 SS when the tbclk isn't enabled.That's wrong, sorry.
Am Samstag, 6. Juli 2019 02:24:02 UTC+2 schrieb Super Duper88:I had also the idea to enable clock for PWMSS2 via enabling control module bit.But writing to "pwmss_ctrl Register" 0x44E10664 didn't change behaviour.How do you write? The PRU has no write access to that adress (just fails, no message). It needs the ARM in supervisor mode (kernel module).
Maybe I have to write also to "CM_PER_EPWMSS2_CLKCTRL Register" at 0x44E000D8?Sure, this reg must contain the value 2. The PRU can write.RegardsPS: You could use the loadable kernel module from libpruio to fix this issue. First, it enables all PWM module clocks [0-2] (like in 3.8 kernel). And later you can adapt the setting via sysfs (to synchonize PWM modules). Just install the libpruio-lkm package from Arends PPA. Find details at
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I assumed if PRU has access to global memory, I could write everywhere but that's obviously wrong.Also thanks for the link to libpruio. Impressive work!