root@am57xx-evm:~# canconfig can0 bitrate 50000 ctrlmode triple-samplin
[ 757.361582] omap_hwmod: dcan1: _wait_target_disable failed
can0 bitrate: 50000, sample-point: 0.875
[ 757.376837] omap_hwmod: dcan1: _wait_target_disable failed
can0 ctrlmode: loopback[OFF], listen-only[OFF], tripple-sampling[ON],one-shot[OFF], berr-reporting[OFF]
root@am57xx-evm:~# ifconfig can0 up
root@am57xx-evm:~# lsmod | grep can
can_raw 6589 2
can 29904 1 can_raw
c_can_platform 6638 0
c_can 9718 1 c_can_platform
can_dev 12397 1 c_can
root@am57xx-evm:~# cat /proc/device-tree/ocp/can\@481cc000/status
okay
/** * _omap4_disable_module - enable CLKCTRL modulemode on OMAP4 * @oh: struct omap_hwmod * * * Disable the PRCM module mode related to the hwmod @oh. * Return EINVAL if the modulemode is not supported and 0 in case of success. */static int _omap4_disable_module(struct omap_hwmod *oh){ int v;
if (!oh->clkdm || !oh->prcm.omap4.modulemode) return -EINVAL;
/* * Since integration code might still be doing something, only * disable if all lines are under hardreset. */ if (_are_any_hardreset_lines_asserted(oh)) return 0;
pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__);
omap_cm_module_disable(oh->clkdm->prcm_partition, oh->clkdm->cm_inst, oh->prcm.omap4.clkctrl_offs);
v = _omap4_wait_target_disable(oh); if (v) pr_warn("omap_hwmod: %s: _wait_target_disable failed\n", oh->name);
return 0;}
&dra7_pmx_core {
dcan1_pins_default: dcan1_pins_default {
pinctrl-single,pins = <
DRA7XX_CORE_IOPAD(0x37d0, PIN_OUTPUT_PULLUP | MUX_MODE0) /* dcan1_tx */
DRA7XX_CORE_IOPAD(0x37d4, PIN_INPUT_PULLUP | MUX_MODE0) /* dcan1_rx */
>;
};
dcan1_pins_sleep: dcan1_pins_sleep {
pinctrl-single,pins = <
DRA7XX_CORE_IOPAD(0x37d0, MUX_MODE15 | PULL_UP) /* dcan1_tx.off */
DRA7XX_CORE_IOPAD(0x37d4, MUX_MODE15 | PULL_UP) /* dcan1_rx.off */
>;
};
};
&dcan1 {
status = "okay";
pinctrl-names = "default", "sleep", "active";
pinctrl-0 = <&dcan1_pins_sleep>;
pinctrl-1 = <&dcan1_pins_sleep>;
pinctrl-2 = <&dcan1_pins_default>;
};