A new (old) I/O Bus Standard

[Phillip Stevens]

On the other thread there is a substantial discussion about a new processor bus standard, which could support multiple CPUs per chassis and separate memory and processor cards, etc, etc.

Whilst that's a useful discussion, I think there's also a need to have a simple I/O bus standard defined, which can allow the development of I/O expansion capabilities and devices that don't need to be run synchronously with processor clocks.

tl;dr - imho the best I/O bus standard already exists and it is the 44-pin IDE bus.

I was looking at the right way to do this some time ago and I think the real issues are the expense of connectors, and the ready availability of cable hardware to connect different boards together, rather than which pin does what. If the standard exists, and it isn't broken, it is best to try to reuse it.

There's a link to the discussion started by Ed Brindley, on rc2014-z80, for reference.

Speaking for the 44-pin IDE physical standard we have:

• Cheap connectors - available everywhere
• Keyed connector - prevents reverse insertion - and reverse insertion is benign
• Ready availability of cables, both point to point, and bus type - everyone has at least 10 of these cables in their old PC box.
• Cable length ranging from 50mm to 690mm

Speaking for the 44-pin IDE bus we have:

• 16-bits of data pins
• Sufficient Address and Device Select pins for lots of I/O
• DMA, I/O Ready, I/O Request
• Strobes for Read and Write
• Integrated power supply at 5V - option for separate Motor supply at 12V or 3V3

Speaking for the 44-pin PATA bus standard we have:

• Directly connect PATA drives
• Directly connect Compact Flash drives in native 16-bit mode

Because I thought the IDE interface was the right thing to do, I use the IDE connector as the off board I/O bus for the YAZ180, configured so it can both support PATA drives and 82C55 Mode-1 and Mode-2 I/O directly. In this case it is driven by a Motorola 82C55 24-bit PIO device (because it was sufficiently "ancient" to qualify for me). But is is not necessary to do it in this way. Any PIO device or bus latch system could achieve the same result.

My 2c. Thoughts?

Phillip

[Alan Cox]

tl;dr - imho the best I/O bus standard already exists and it is the 44-pin IDE bus.

The IDE bus is 40 pin. Do you mean the IDE bus or the IDE bus plus adjacent power connector on laptop drives (which isn't properly keyed in most cases) and I thought didn't line up with 2.54mm spacing ?

I was looking at the right way to do this some time ago and I think the real issues are the expense of connectors, and the ready availability of cable hardware to connect different boards together, rather than which pin does what. If the standard exists, and it isn't broken, it is best to try to reuse it.

You need to be careful with IDE cables because of CSEL and in some cases additional components on the wire (on the 80wire cables) so that the cable detect logic works for IDE. Not every pin is guaranteed usable. I'm not aware of any rule that the cable can't bond the grounds together either.

The 2x20 one is defined in the standard as 3M 3417-7000, with 28AWG wire and a few other electric requirements (the later standards restated it as a giant pile of electrical characteristics to meet ANSI standardisation rules but the original specs say 3M 3417-7000 or equivalent). The signalling on top of it for PIO-0 is basically ISA bus. It really is just an ISA bus extender and that was how it was originally designed using an existing bus and parts.

Alan

[Phillip Stevens]

tl;dr - imho the best I/O bus standard already exists and it is the 44-pin IDE bus.

The IDE bus is 40 pin. Do you mean the IDE bus or the IDE bus plus adjacent power connector on laptop drives (which isn't properly keyed in most cases) and I thought didn't line up with 2.54mm spacing ?

Yes, I actually mean the 44-pin IDE bus, widely used for 2.5" lap-top drives, with most of the Compact Flash adaptors, and more recently with low power and small form factor SSD PATA drives.

The ones that I've seen usually have either a missing pin, or (like Ed's RC2014 IDE adaptor), have a shielded connector. 

In any case, they are designed that plugging incorrectly doesn't result in any fatal damage to either end of the cable.

The 44-pin IDE is not on the typical 0.1" pitch. I think the spacing is 2mm pitch, but I stand to be corrected.

The difference in size between the two plugs can be seen on Ed's RC2014 board.

Aside, also of note on Ed's RC2014 board are the 4 jumpers which are designed to allow his IDE interface to become a generalised bi-directional 82C55 Mode 1 or Mode 2 parallel I/O interface.

I was planning (still am but the 'tuit list is too long now to count on anything) to build a parallel keyboard, using the 82C55 IDE adaptor for the RC2014, and for the the YAZ180.

The main advantage (aside from the ready availability of connectors, cables, and documentation), is that one cable is sufficient to connect boards together. Power (at reasonable current) is carried on the cable, as are all signals.

 

I was looking at the right way to do this some time ago and I think the real issues are the expense of connectors, and the ready availability of cable hardware to connect different boards together, rather than which pin does what. If the standard exists, and it isn't broken, it is best to try to reuse it.

The signalling on top of it for PIO-0 is basically ISA bus. It really is just an ISA bus extender and that was how it was originally designed using an existing bus and parts.

Makes sense that they reused the ISA bus standard for PIO-0. That certainly makes the 44-pin IDE interface an easy win for, and complementary to, an ISA bus computer using any CPU.

Phillip