Nand2Tetris chapter 1: Boolean Logic

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Chris Lowis

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Oct 25, 2014, 7:27:38 AM10/25/14
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Hello!

I've been working through the introduction and chapter 1 of "The Elements of Computing Systems" on the train this morning. I think a good format for the first meeting would be to try and tackle the first project in small groups at the meeting itself. This project involves implementing Not, And, Or, Xor, Multiplexor, Demultiplexor, and multibit versions of the same using the hardware description language and hardware simulator provided on the website.

In preparation for that it would probably make sense to read the chapter (and optionally the introduction), and perhaps install the software and do one of the tutorials.

I've been doing the chip design on paper too, so that's also an option for us.

I can't make the meeting, sadly, so feel free to ignore the above and do your own thing. Having worked through the chapter this seems like a reasonable approach which would allow us to do some coding/problem solving as a group.

Bonus projects for those who are very familiar with the material might be: research optimal circuit design techniques, research implementing gates using transistors, or building a hardware simulator in a language of your choice, e.g ruby. :-)

Hope that helps,

Chris.

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Chris Lowis

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Oct 29, 2014, 5:04:11 PM10/29/14
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To follow up on this, for those that don’t have the book, the full chapter 1 is available from the nand2tetris website:

http://www.nand2tetris.org/chapters/chapter%2001.pdf

I’ve eye-balled the PDF and it looks to be the same as my paper copy (3rd edition). 

If you don’t have a copy of the book, buy it through the link on http://london.computation.club and we can use the referral revenue to buy extra copies for the group. 

The hardware simulator tutorial is here:

http://www.nand2tetris.org/tutorials/PDF/Hardware%20Simulator%20Tutorial.pdf

and the software suite is available to download from here:

http://www.nand2tetris.org/software.php

Cheers, 

Chris 

Jamie White

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Oct 29, 2014, 5:11:25 PM10/29/14
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Thanks Chris. Shame you can't make the meeting. Can we Skype you in to help set the scene?

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Chris Roos

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Oct 30, 2014, 6:27:23 AM10/30/14
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We've got a Mac Mini and a nice mic set-up on a portable TV stand if
Skyping in is of interest.
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Paul Mucur

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Nov 2, 2014, 6:56:29 AM11/2/14
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It's worth noting that chapter 1 refers to appendix A which you can
find (along with the first six chapters of the book) at
http://www.nand2tetris.org/course.php

I've made a git repo of my own workings but I'm conscious that Tom did
say that he regretted housing The Little Schemer repo under his own
account. Given that we'll be tackling the problems as a group, it
might be worth forking into the computationclub organisation from this
commit: https://github.com/mudge/nand2tetris/commit/88dce55b8ff3fb1c9f78610fcdf8faa50657b16c
(spoiler alert: I've tried my hand at the first batch of exercises so
avoid later commits).
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Jamie White

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Nov 2, 2014, 7:27:53 AM11/2/14
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Also had a crack at the exercises in chapter 1 and pushed to GitHub. Looking forward to seeing how everyone reasons through the design of these chips. Found them straightforward for the most part but there were a couple where I reached for pencil and paper.

Tom Stuart

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Nov 3, 2014, 4:15:57 AM11/3/14
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On 25 Oct 2014, at 12:27, Chris Lowis <chris...@gmail.com> wrote:
> I think a good format for the first meeting would be to try and tackle the first project in small groups at the meeting itself.

Having now read the chapter, I agree that this is a good way to start.

My 2p is that I found it hard to resist the temptation to start building a hardware simulator while I read the chapter, whether in Ruby (because it’s a nice language) or JavaScript (because then we could put it on the web and it would be easy to give it a GUI). I’m not suggesting that anyone else would be into it, but in case we get all the chapter 1 exercises done in half an hour, it’s an option for something else we could do before continuing to chapter 2.

FWIW I think writing a hardware simulator decomposes nicely into three self-contained (and not too difficult) parts:

1. Turn an .hdl file into an abstract syntax tree (i.e. a parser, whether written from scratch or using a PEG parse generator like Treetop/PEG.js/Canopy)
2. Turn an abstract syntax tree into a collection of domain objects representing the chip to be simulated (e.g. perhaps we have instances of classes called Chip, Pin etc, with those instances connected to each other according to what the HDL says)
3. Turn the domain objects and some input pin values into output pin values by simulating the behaviour of the chips — I think there are a couple of interesting ways to do this (roughly: simulate the hardware from “outside” by walking over it in the right order (topological sort on pin connections) and working out what each pin’s value is; or simulate it from “inside” by representing pin signals as message sends — send the input messages to the input pins and let the messages propagate through the chips until the output pins receive messages)

So in principle we could split into groups, build those bits, and then glue them together afterwards.

Again, not trying to persuade anyone that this is a good idea, just putting it out there in case we need an emergency backup activity, and/or extra credit for those who’ve already done the exercises.

Cheers,
-Tom

Roland Swingler

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Nov 3, 2014, 4:59:57 AM11/3/14
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Writing a hardware simulator sounds like it would be interesting. I think the most interesting part of the problem is (3), partially because I think you can wire output pins back into input pins (I can't remember if you need to get to the sequential chips chapter before that makes any sense) so it implies your chip graph has loops which need to be dealt with.

R

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Tom Stuart

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Nov 3, 2014, 5:04:46 AM11/3/14
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On 3 Nov 2014, at 09:59, Roland Swingler <roland....@gmail.com> wrote:
> I think you can wire output pins back into input pins (I can't remember if you need to get to the sequential chips chapter before that makes any sense) so it implies your chip graph has loops which need to be dealt with.

Loops are only allowed for clocked chips (see page 291 in http://nand2tetris.org/chapters/appendix%20A.pdf) which we don’t need to deal with yet. Perhaps in chapter 2 we will, which would give us a nice extra feature to work on next time.

Cheers,
-Tom

Tim Cowlishaw

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Nov 3, 2014, 6:06:38 AM11/3/14
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On 3 November 2014 09:15, Tom Stuart <t...@codon.com> wrote:

FWIW I think writing a hardware simulator decomposes nicely into three self-contained (and not too difficult) parts

I really like this idea. it struck me while reading chapter 1 that the semantics of HDL are quite different to the programming languages I've been exposed to (in particular, the idea that you conjure 'wires' into existence just by naming them  and connecting them to an arbitrary number of things, rather than having some explicit concept of assignment, if that makes sense), so I think it'd be a really interesting challenge!

It'd be interesting to try out different approaches for implementing chip behaviour, as you've described, too, and then seeing which work best (in terms of benchmarks, but also ease / elegance of implementation)!

Thanks,

Tim

Roland Swingler

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Nov 3, 2014, 6:12:48 AM11/3/14
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On another note, I'd be really interested in "how a chip could be implemented in actual electronics for dummies" if anyone in the group knows about such things (I appreciate real chips may be implemented in a completely different more complex way, but having some grasp of how a chip *could* be implemented would be interesting).

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Jamie White

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Nov 3, 2014, 8:08:51 AM11/3/14
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+1 for implementing our own hardware simulator.
+1 for building it in javascript.

I had a quick google for existing ports but didn’t find any. Seems like a fun way to contribute back to the N2T community.


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Tom Stuart

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Nov 3, 2014, 8:12:58 AM11/3/14
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On 3 Nov 2014, at 13:08, Jamie White <ja...@jgwhite.co.uk> wrote:
> +1 for implementing our own hardware simulator.
> +1 for building it in javascript.
>
> I had a quick google for existing ports but didn’t find any.

FWIW:

* Paul M pointed out https://github.com/tuzz/hdl (Ruby)
* James M pointed out http://logic.ly/ (JS, commercial, not obvious whether it supports HDL)
* @daan_van_berkel said that James Coglan started writing a logic simulator in JS, but I can’t find it anywhere

Cheers,
-Tom

Tom Stuart

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Nov 3, 2014, 8:14:14 AM11/3/14
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On 3 Nov 2014, at 13:12, Tom Stuart <t...@codon.com> wrote:
> * Paul M pointed out https://github.com/tuzz/hdl (Ruby)
> * James M pointed out http://logic.ly/ (JS, commercial, not obvious whether it supports HDL)
> * @daan_van_berkel said that James Coglan started writing a logic simulator in JS, but I can’t find it anywhere

In any case, I should explicitly say: for me the point would be to have the fun & educational benefit of writing our own simulator together. If we just want to simulate the HDL then we can use the one that comes with the book.

James Mead

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Nov 4, 2014, 3:48:21 AM11/4/14
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I've also worked through the exercises in chapter 1 and pushed to GitHub.

Look forward to seeing people on Tuesday.

Cheers, James.
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James Coglan

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Nov 5, 2014, 7:09:23 AM11/5/14
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I know I've not been to the club for a while, so take all this with a pinch of salt.

I did begin writing a JS model of gates and pins, but I very quickly got bored with it. It's not a particularly interesting programming problem, and the one interesting thing about it is kinda tedious to sort out. Essentially, because you're writing an imperative implementation you need to deal with situations like "flipping inputs A and B to true" actually means "flipping A to true AND THEN flipping B to true", and the world propagates an intermediate state between those events, and that produces some weird bugs, even if you have an acyclic graph.

_PLUS_ the actual problem -- modelling logic with electronics -- was so new to me that I wasn't really sure if my simulator worked at all correctly, or if my solutions were correct, and I had to use their sim anyway.

Although building languages and VMs is fun, I think this book contains plenty of stuff that will be new to people who work in high-level dynamic languages all day and building our own toolchain for it is a huge distraction. It even involves building a compiler at one point so I think finding other places to solve meta-problems with our own compilers is taking the yak-shave a little far. I would rather engage with the book directly than by trying to build my own platform for "running" the book, since I've gone down that rabbit hole too many times.

Tom Stuart

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Nov 5, 2014, 7:18:07 AM11/5/14
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On 5 Nov 2014, at 12:09, James Coglan <jco...@gmail.com> wrote:
> It's not a particularly interesting programming problem […] this book contains plenty of stuff that will be new to people who work in high-level dynamic languages all day and building our own toolchain for it is a huge distraction […] finding other places to solve meta-problems with our own compilers is taking the yak-shave a little far

Thanks James, I’m very happy to take this advice. The last thing I want is for us to get bogged down in incidental details, especially at such an early stage. As it turned out we didn’t even get onto the more challenging chapter 1 exercises last night so there was definitely no need for “extra credit” activities like building a hardware simulator!

Roland Swingler

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Nov 5, 2014, 7:19:26 AM11/5/14
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> and the world propagates an intermediate state between those events, and that produces some weird bugs

I think that is what I thought might be interesting how to solve - I wasn't immediately sure about how to approach such a difficulty. Did you get to a point where you'd solved this or not?

R

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James Coglan

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Nov 5, 2014, 7:24:19 AM11/5/14
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On 5 November 2014 12:19, Roland Swingler <roland....@gmail.com> wrote:
> and the world propagates an intermediate state between those events, and that produces some weird bugs

I think that is what I thought might be interesting how to solve - I wasn't immediately sure about how to approach such a difficulty. Did you get to a point where you'd solved this or not?

No, because I was more interested in the material in the book than inventing even more problems to solve, and I thought it would be more productive to build my own tools if/when I'd understood the book. But totally a personal preference.

From viewing the notes, it looks like a lot of interesting related material came out of the meeting, but I don't know how much of that arose from solving the book problems themselves or from building the sim? 

Roland Swingler

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Nov 5, 2014, 8:01:07 AM11/5/14
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> but I don't know how much of that arose from solving the book problems themselves or from building the sim

We didn't even start building a sim really (beyond the ruby code that Tom wrote). Mostly came out of a discussion as to how to optimize the design cost based on number of chips used (and we also briefly touched on wire crossovers).
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