Coming, and request for feedback: Soundcard AY/YM based sound card

[Jon Langseth]

As I have hinted to, I have been working on a sound card based on the AY3-8910/YM2149 sound chip. Before ordering my final prototype, I wanted to show off what I have currently. If anyone has feedback to add, it is much appreciated.

I have already uploaded the schematics and source code for an adapted version PTxPlay to GitHub at https://github.com/linc80/Z50AYMSound so I won't replicate all the information from the README file, only highlight some of the significant points:

The design of this card is based on an early prototype I made for the RC2014, adapted to the Z50Bus. The main "invention" is the address decode/glue logic, the rest of the circuit is a fairly standard implementation of an AY3-8910 circuit for the Z80. Some inspiration in the analog section comes from the "Simple AY interface" from hw.speccy.cz, as well as the ZX Spectrum output. 

Clock generation for the AY/YM is done using a dedicated, on-board canned oscillator, like the one used on the LiNC80 SBC1. The clock input of the AY/YM selects the tuning of audio waveforms. Oscillators running at 1.8432MHz are readily available with an acceptable price, and quite close to the "speccy" frequency of 1.77MHz. If one desires an authentic tuning, there's a prototyping area on board where a more precise can be built :)

Speaking of the prototyping area, I've pulled out the two 8-bit I/O ports of the AY/YM to a SIL-header adjacent to the prototyping area.

As this card is very closely (but not directly) related to Ed Brindley's card as described at https://groups.google.com/forum/#!msg/rc2014-z80/AX3ykQC0B9c/nyVix6jsDAAJ, I have taken the liberty of standing on his shoulders to make Sergey Bulba's PTxPlayer working. As I based my design on my own prototype, which predates Ed's design, I used a different I/O address scheme. The "default" I/O addresses I have used are 0x50 and 0x51, whereas Ed used 0xD0 and 0xD8. This, and the changes to make a CP/M friendly build is the major change I have done.

Speaking of I/O addressing. The card has a dip-switch for selecting the base address, fully decoded to any even I/O address. Writing to the Base address sets the selected register, while writes or reads on Base+1 writes/reads the selected address.

I am planning on making this available as PCB and Kit, but for the kit version I will not be including the AY3-8910 (or YM2149) chip.

[Jon Langseth]

There hasn't been a lot of feedback yet, but I've already noticed one change I think I should make:

Adding the system/cpu clock to the SIL header next to the prototyping area. This will allow an experimenter to use the CPU clock, and one possible use for this is to use the CPU clock divided by two or four as the audio-clock, as Ed does on his card. I'd like to not add dedicated the dedicated circuit, but still keep the option easily available for anyone who wants to add it.

I see that I can easily route the Clock signal from pin 23 of the Bus over to where the SIL row is, if I simply add it next to GND, and let it be "the new pin 1" on the SIL.

Speaking of Ed, I notified him of this "announcement", and he kindly replied with tips about some more versions of music-players that should be reasonable to "port":

* A version of PTxPlay that converts it to a proper CP/M program and takes filename as a command line parameter: https://github.com/MMaciocia/RC2014-YM2149

* A Tune app in RomWBW that also incorporates MYMPlay, and can also use the CTC for timing: https://github.com/wwarthen/RomWBW/tree/master/Source/Apps/Tune

The RomWBW link will not be directly relevant to a LiNC80 SBC1, as the SBC1 requires some significant modification to run RomWBW, but it is a nice link for a RomWBW-compatible Z50Bus system)

[Jon Langseth]

I've added the mentioned change of adding the Clk signal, and a solder-pad to use for "injecting" audio/sound clock. I also changed all the pull-up/pull-down resistors to 100k (tested and verified). There's no need to use a very strong pull-down as 4.7k is. 270k was a bit too weak, and 100k is just fine. This leads to a lower current draw, with no change in stability or cost. I am considering doing the same to the 8-bit digital i/o card :) 

[Jon Langseth]

So, a month-and-a-half later, I've made one significant design-change myself, and had a couple of mails with positive feedback and no comments for change. I've spun prototype boards and a final "beta" iteration, and I now consider the design final.

The only significant change since last mail, is that I've done a 180 on the sound-clock. Instead of having an oscillator can plus the option of injecting a different source, I've added a simple clock-divider that also allows simple injection of a sound clock. The divider is based directly on what Ed does, with a 74LS74 dual J/K flipflop wired as two stages of Toggle-flip-flops, fed by the CPU clock. The two stages are connected to a 3-pin header (2-way jumper selection), allowing selection of Clock/2 or Clock/4 as input to the AY or YM chip. If a builder wants to feed a clock generated by a circuit on the prototyping area (like a can-osc or tuned circuit), it can readily be fed to the AY/YM via the middle pin of the jumper header. This approach is actually more flexible than my original can-oscillator design. As a bonus, a 74xx74 is much cheaper than the oscillator, meaning I can sell these cheaper than I had planned.

I'm hoping to be able to complete my documentation for the sound-card within the next two weeks, and as I already have received the production-boards the product should go "live" one of the first 5 days of November (if not earlier). The source files on GitHub are already up-to-date.

Here are a few pictures, high-res versions can be seen at the link below:

I've posted more updated photos of the prototype and design at http://photos.defcon.no/2018-10-19-z50aymsound-preprod 

[Steve Cousins]

That's looking good Jon.

Steve