Full Duplex and VCO Separation

[Brian Padalino]

When setting up for full duplex operation, is there a recommended frequency offset that should exist between the RX and TX VCO's?  If you violate the recommendation, what does that look like on the received signal?  Does it modulate the incoming signal by the beat frequency between the two VCO's?

Do I have to follow the same guidelines if I am doing half duplex operation or can I have both of the VCOs up and running on the same frequency while toggling the RXEN and TXEN control signals?

Thanks,

Brian

[Ricardas Vadoklis]

Brian,

We do recommend to keep 1 MHz difference between the Tx PLL and Rx PLL
in full duplex operation. The recommended frequency difference will
guarantee PLL stability and PLL phase noise performance.

There is no need to have frequency difference between Tx/Rx PLL in half
duplex mode, as only one VCO will work at time.

Best Regards,
Ricardas Vadoklis,

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[Alexander Chemeris]

On Mon, Feb 25, 2013 at 5:26 PM, Ricardas Vadoklis
<r.vad...@limemicro.com> wrote:
>> Do I have to follow the same guidelines if I am doing half duplex operation or can I have
>> both of the VCOs up and running on the same frequency while toggling the RXEN and
>> TXEN control signals?

> There is no need to have frequency difference between Tx/Rx PLL in half
> duplex mode, as only one VCO will work at time.

Is that true for the "semi-TDD" mode about which Brian is asking? I.e.
when LMS6002D is operating in FDD mode an dyu use RXEN/TXEN to switch
between Rx and Tx?

--
Regards,
Alexander Chemeris.
CEO, Fairwaves LLC / ООО УмРадио
http://fairwaves.ru

[Ricardas Vadoklis]

Alexander,

Yes, it is the same, because only one VCO will be power on whatever you
use to switch between Tx and Rx; hardware enable pins (RXEN/TXEN) or
software enable.

Best Regards,
Ricardas Vadoklis,

[Alexander Chemeris]

Ricardas,

Just to make sure - is SRXEN/STXEN registers equivalent to TXEN/RXEN pins?

On Tue, Feb 26, 2013 at 1:50 PM, Ricardas Vadoklis

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[Srdjan Milenkovic]

Hi Alexander,

Yes they are, internal control signals are constructed using logical AND
in the following way

iTXEN = TXEN and STXEN
iRXEN = RXEN and SRXEN

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[Alexander Chemeris]

Hi Srdjan,

Thank you for clarification. I've added this info to the documentation
notes on github:
https://github.com/chemeris/lms6002-documentation/blob/master/issues.md

>>>> CEO, Fairwaves LLC / ООО УмРадио

>>>> http://fairwaves.ru
>>>>
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>> Alexander Chemeris.

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>> http://fairwaves.ru
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Regards,
Alexander Chemeris.

CEO, Fairwaves LLC / ООО УмРадио
http://fairwaves.ru