Home CMOS group

[Bryan Bishop]

There's a Home CMOS group that some of you might be interested in.

http://code.google.com/p/homecmos/

irc.freenode.net #homecmos

logs: http://en.qi-hardware.com/homecmos-logs/

First test of KOH etching of <110> Si with metal hardmask (die 5J3). 20μm half-pitch, 400x mag.

 
Nyanotechnology! This nyan cat is etched into a 200nm thick copper film and is around 600μm from head to tail.

Chip #5I4 (20 μm half-pitch lines in evaporated copper over Cr adhesion layer on silicon) seen at 170x magnification.

Chip #5I4 seen at 1000x magnification. Light areas are copper, dark are silicon, medium are incompletely etched chromium.

- Bryan
http://heybryan.org/
1 512 203 0507

[Nathan McCorkle]

too bad they don't have a mailing list...

--
You received this message because you are subscribed to the Google Groups "DIYbio" group.
To post to this group, send email to diy...@googlegroups.com.
To unsubscribe from this group, send email to diybio+un...@googlegroups.com.
For more options, visit this group at http://groups.google.com/group/diybio?hl=en.

--
Nathan McCorkle
Rochester Institute of Technology
College of Science, Biotechnology/Bioinformatics

[Daniel C.]

So they're actually creating their own CMOS chips at home?  Are they
functional?  How do they get an interface to the electronics?

-Dan

2012/4/2 Nathan McCorkle <nmz...@gmail.com>

[Bryan Bishop]

On Mon, Apr 2, 2012 at 10:47 PM, Daniel C. <dcroo...@gmail.com> wrote:

So they're actually creating their own CMOS chips at home?  Are they
functional?  How do they get an interface to the electronics?

I don't know the answers to your first questions. But for interfacing.. (and ignoring all of the issues with packaging) you can draw a contact line out, and then increase the area until it's a sufficient size for connecting with whatever circuit. This does have some costs associated with it though. Come to think of it, I have no idea how you would do packaging on your own..

[Cory Geesaman]

http://www.flickr.com/photos/jeriellsworth/sets/72157607161498665/ 

[John Griessen]

On 04/02/2012 10:55 PM, Bryan Bishop wrote:
> I have no idea how you would do packaging on your own..

They could do some thick film conductive trace printing to overlap the silicon and connect to
an alumina substrate and make edge contacts with metal plating on them like chip resistor arrays.
That could have a low temp glass seal layer on top of it. Sounds difficult without robots.

[John Griessen]

On 04/03/2012 07:31 AM, Cory Geesaman wrote:
> http://www.flickr.com/photos/jeriellsworth/sets/72157607161498665/
>

Wow, she's got a gold wire bonder and a SEM!

[drllau]

http://www.youtube.com/watch?feature=player_detailpage&v=dfNByi-rrO4

soft lithography using conductive silver ink and continuous drawing ... (U Illinois)

Lawrence
http://www.linkedin.com/in/drllau

[Cory Geesaman]

Those silver nitrate pens have pretty terrible conductivity without a lot of surface prep.  Not very good for anything past fixing a ding in a circuit board that has a pretty robust power supply or doing what they showed in the video.  I don't think you could feasibly print a complex circuit out with them.