enclosed a10 user manual with registers.

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Dennis Medina

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Sep 23, 2012, 2:33:11 PM9/23/12
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i enclosed a a10 user manual with register for the comunity!
A10 User manual.pdf

Alejandro Mery

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Sep 23, 2012, 2:37:45 PM9/23/12
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On 23 September 2012 20:33, Dennis Medina <adame...@hotmail.com> wrote:
> i enclosed a a10 user manual with register for the comunity!
>

hi... isn't that NDAed?

NOD

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Sep 23, 2012, 3:33:14 PM9/23/12
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Eh, I've seen that exact document out in the wild (internet) for awhile now, Though with different "watermarking"

So even IF it is covered by a NDA, then it's kinda pointless since a simple Google search leads you right to it.

mr.hipboi

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Sep 24, 2012, 12:51:33 AM9/24/12
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在 2012年9月24日星期一UTC+8上午2时33分12秒,Dennis Medina写道:
i enclosed a a10 user manual with register for the comunity!
This is unbelievable. Where do you find it. When i was at Allwinner, i can never get this pdf on my computer. I have to login to a windows server every time to view it. It IS the user manual. 

Alejandro Mery

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Sep 24, 2012, 2:47:14 AM9/24/12
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was it really the same document? many sections are empty....

Roc Vallès

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Sep 24, 2012, 4:15:37 AM9/24/12
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Doesn't allow printing, among other things.

Easily solved with qpdf: http://qpdf.sourceforge.net/

qpdf --decrypt A10\ User\ manual.pdf A10_User_manual_decrypted.pdf

Sergey Lapin

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Sep 27, 2012, 9:47:10 PM9/27/12
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On Sun, Sep 23, 2012 at 10:33 PM, Dennis Medina <adame...@hotmail.com> wrote:
> i enclosed a a10 user manual with register for the comunity!
>
> --
>
>

Too bad there's no NAND register descriptions :(

jons...@gmail.com

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Sep 27, 2012, 9:53:40 PM9/27/12
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Look in the kernel source. It is probably a standard ARM Primecell.
Doc for those is on the arm.com website.

Can AllWinner give us a list of standard ARM Primecells used? That
would solve a huge amount of the documentation issue since all of
those Primecells have full documentation over on arm.com.

You can also scan the peripheral regions looking at the end of each
region for the Primecell identification register.

>
> --
>
>



--
Jon Smirl
jons...@gmail.com

Henrik Nordström

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Oct 7, 2012, 6:10:12 PM10/7/12
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tor 2012-09-27 klockan 21:53 -0400 skrev jons...@gmail.com:

> > Too bad there's no NAND register descriptions :(
>
> Look in the kernel source. It is probably a standard ARM Primecell.
> Doc for those is on the arm.com website.

Do not look like one to me.

Registers are in drivers/block/sunxi_nand/nfc/nfc.h and also bit
definitions for most registers.

Regards
Henrik

jons...@gmail.com

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Oct 7, 2012, 6:39:00 PM10/7/12
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Here's the manual for some of the ARM NAND Primecells.
http://infocenter.arm.com/help/topic/com.arm.doc.ddi0380g/DDI0380G_smc_pl350_series_r2p1_trm.pdf

In section 3.3.22 they talk about the Primecell ID registers. Most
Primecells have these registers at FE0-FEC. You can poke around in a
debugger or write program to scan for these ID registers in all of the
peripheral blocks. If you are able to locate them you will be able to
look up the doc for the primecell used. Of course ARM is not the only
place you can buy cells and ARM makes a lot of different cells. The
location of these ID registers is commonly left out of the vendor's
documentation.

It would be much easier if Allwinner just told us which cells they
used. Then we could chase the cell vendors for documentation or find
it in the manual for another CPU.

--
Jon Smirl
jons...@gmail.com

Henrik Nordström

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Oct 7, 2012, 7:07:25 PM10/7/12
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sön 2012-10-07 klockan 18:39 -0400 skrev jons...@gmail.com:
> Here's the manual for some of the ARM NAND Primecells.
> http://infocenter.arm.com/help/topic/com.arm.doc.ddi0380g/DDI0380G_smc_pl350_series_r2p1_trm.pdf
>
> In section 3.3.22 they talk about the Primecell ID registers. Most
> Primecells have these registers at FE0-FEC.

There is no such ID fields in any of the Allwinner peripheral I/O
registers windows as far as I know.

And register layout of the NAND controller do not match the above
primecell at all from what I can see.

This is the register layout of the NAND controller used by Allwinner:

CTL 0x0000
ST 0x0004
INT 0x0008
TIMING_CTL 0x000C
TIMING_CFG 0x0010
ADDR_LOW 0x0014
ADDR_HIGH 0x0018
SECTOR_NUM 0x001C
CNT 0x0020
CMD 0x0024
RCMD_SET 0x0028
WCMD_SET 0x002C
IO_DATA 0x0030
ECC_CTL 0x0034
ECC_ST 0x0038
DEBUG 0x003C
ECC_CNT0 0x0040
ECC_CNT1 0x0044
ECC_CNT2 0x0048
ECC_CNT3 0x004c
USER_DATA_BASE 0x0050
SPARE_AREA 0x00A0
RAM0_BASE 0x0400
RAM1_BASE 0x0800

But it does look fairly simple to deal with.

Regards
Henrik

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