INDUSTRY GADFLY: "From Beirut To Bosnia" + Reader Response
John Cooley
!!! "It's not a BUG, jco...@world.std.com
/o o\ / it's a FEATURE!" (508) 429-4357
( > )
\ - / INDUSTRY GADFLY: "From Beirut To Bosnia" & Response
_] [_
by John Cooley, EE Times Columnist
Holliston Poor Farm, P.O. Box 6222, Holliston, MA 01746-6222
More than once I've thought of the Verilog/VHDL Wars as being the EDA
industry's equivalent of Beirut. What has made this war particularly
interesting to watch was the proxy propaganda war being fought via industry
analysts. Ron Collett of Collett International made big news for predicting
that VHDL was going to beat Verilog some time around '92. Gary Smith of
Dataquest also caused a minor uproar when he claimed at the '94 DAC that VHDL
revenues were just then beating Verilog revenues and projected it would only
get better for VHDL. Bill Fuchs, the never shy Chairman of Open Verilog
International (OVI), howled over the past four years that OVI's surveys
found that Verilog's revenues were easily *twice* to *four times* what these
analysts were seeing. Of course, just like Middle Eastern politics, each
side very quickly refuted the other side's industry numbers while quietly
accusing the other of being secretly affiliated with various VHDL or Verilog
terrorist organizations.
Suddenly, like UN Peacekeepers coming to Beirut on very large aircraft
carriers floating in the Mediterranean Sea, the industry association of
Electronic Design Automation Companies (EDAC) commissioned their own EDA
wide survey using the good offices of the Big Eight accounting firm Arthur
Anderson. The bombshell that came out of this study was that although for
the 1994 fiscal year EDAC found a revenue split of 54 per cent for Verilog
to 46 percent for VHDL on a total of $124 million -- for the first three
quarters (forth quarter numbers aren't out yet) of the 1995 fiscal year this
split has <BEGIN ITALICS> changed to 66 per cent for Verilog to 34 per cent
for VHDL <END ITALICS> on a total of $78 million! Doing his best CEO-speak,
Harvard MBA Alain Hanover (President & CEO of Viewlogic and Chairman of EDAC)
commented: "We needed objective statistics on topics like Verilog versus
VHDL, synthesis, and schematic capture to enable EDA companies to make
intelligent strategic business decisions. In 1995, we are also seeing a
clear lead in HDLs as the dominate input for design and Verilog as the
predominate language." (To get a copy of the EDAC Market Statistics report
covering this and much more call (408) 287-6371.)
A quick phone call to tell Bill Fuchs the news not only yielded a "Yeehaw!"
but also a litany of how frustrating it was for four years to be banging
heads with Dataquest and Collett International when his numbers so wildy
disagreed with theirs. "Now with EDAC's Arthur Anderson report, my numbers
are being vindicated. Verilog's won! I'm quite pleased!"
Privately I know this issue won't be completely resolved so quickly and
quietly. Like Beirut, it's a religious war. (I'm humorously wondering what
the VHDL Fundamentalists will do to undermine this heretical EDAC report.)
For 1996 I see the EDA industry's crisis-du-jour moving out of the Verilog
vs. VHDL Beirut and into a UNIX workstation vs. PC Bosnia. Just because EDA
products can run on PC's doesn't mean they can be PC priced. The economics
don't work. Yet engineers are genetically predisposed to "gak" at the idea
buying $70,000 worth of software to run on $1,500 worth of PC. To get a
better view of this new industry wide hot button I suggest that you come to
Richard Goering's panel at IVC on Weds., Feb 28th at the Santa Clara
Convention Center. It should be an eye opener.
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John Cooley runs the grassroots E-mail Synopsys Users Group (ESNUG), is
president of the Users Society of Electronic Design Automation (USE/DA), and
makes his living as an independent contract ASIC/FPGA designer. He loves
receiving e-mail from fellow engineers at "jco...@world.std.com" or phone
(508) 429-4357. [ Copyright 1995 CMP/EE Times Publications ]
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ONE READER'S RESPONSE (more are always welcome!)
From: Mahendra Jain, Executive Director, VHDL Int'l
Dear EE Times,
I'd like to respond to John Cooley's Industry Gadfly Column in last week's
issue. Once again, I believe his comments are based on incomplete
information. I hope you'll allow me to explain.
The VHDL/Verilog HDL wars are indeed over. We do not believe there are any
wars. The co-location of IVC/VIUF is a symbol that there's no war and, in
fact, shows that OVI and VHDL International are working together
cooperatively.
John Cooley's column discusses the preliminary HDL simulator revenues EDAC
released recently. We think the information provided by EDAC is incomplete
and premature. For example, we don't have information on number of units
sold or the average selling price per unit. We believe these are key
factors and would probably show a different set of results. Industry
research continues to show that designers are opting to use VHDL on a
worldwide basis. VITAL libraries are only now becoming available and over
the next three to six months more will be introduced to support deep
submicron design. VHDL International is publishing a table of available
VITAL Libraries in VHDL Times next month.
VHDL International isn't about comparing languages, simulators or revenues.
Our goal is to better serve the designer community by helping provide tools
to educate them, make their jobs easier and make them more productive. The
EDA Community has the responsibility to provide both VHDL- and Verilog
HDL-based tools as long as it is what designers want.
As the Executive Director of VHDL International, I am disappointed that the
language war continues to be fueled by a seemingly neutral and responsible
industry observer.
Best regards,
Mahendra Jain
Executive Director
VHDL International
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!!! "It's not a BUG, jco...@world.std.com
/o o\ / it's a FEATURE!" (508) 429-4357
( > )
\ - / - John Cooley, EDA & ASIC Design Consultant in Synopsys,
_] [_ Verilog, VHDL and numerous Design Methodologies.
Holliston Poor Farm, P.O. Box 6222, Holliston, MA 01746-6222
Legal Disclaimer: "As always, anything said here is only opinion."
John Williams
We should learn our lesson from Quebec and not push the Verilog thing too
hard. Still, I think, like Quebec, there will be more VHDL users who are
bilingual.
John Williams