I am looking for individuals that would be interested in being a beta tester for the FPGA MARK-1. The FPGA MARK-1 is a highly configurable FPGA platform that is intended to be used as an independent FPGA development board or as an add-on (shield) to existing embedded platforms. The platforms that the MARK-1 is intended to interface with are: 1) Arduino; 2) Raspberry Pi; and 3) Beagle Bone. (See link to the FPGA MARK-1 project page for more details on the design.)
I took some working prototypes to Maker Faire New York to see what people thought and to get feedback on changes that users would like to see. I have made some changes including adding interfacing options for the Raspberry Pi and Beaglebone and have added a high speed data port for high bandwidth applications such as SDR (Software Defined Radio), high speed ADC, video, etc. I am going to be fabricating Beta boards with the changes and would like to have them tested for any required changes before going to production.
I need Beta testers that are proficient in working with the Raspberry Pi, Beaglebone or Arduino. The users need to have some experience in working FPGA’s. I would like the users to experiment with the FPGA Mark-1 interfacing options to one of the listed platforms, get some code examples running on the interfacing platform, and give me feedback on any errors in the design or changes that they would like to see based on their experience. I will supply the users with the FPGA MARK-1 Beta boards and give them a final production unit once fabricated.
I would like to see some existing projects that the users have developed to show that they are proficient in working with one of the listed platforms. I would also like see some FPGA work to show me that they have some experience in working FPGA’s. Please email with these items and I will talk to you further about being a Beta tester.
I would be happy to hear from anyone that may have opinion, insight or suggestion that they would like to share.
Michael Jones
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Depending on when you looked, I added a link to some 3d renders for the bone at the bottom of the page http://valentfx.com/prj/fpga-dev/2-mark-1. It is not as optimal as directly connecting a cape, but I am trying to meet the balance between the multiple capable topologies (Pi, Bone, Arduino, standalone). There are also minimal size and cost criteria that I am trying to meet. Nothing is set in stone at this point. I am very open to hearing your opinions, but please keep in mind that there are many variables being balanced. Currently I am planning in implementing a direct parallel interface between the FPGA and bone and some combination of other pins from P8. Can the dedicated pins(uart, timer,ehrpwm2x) be used as general purpose pins if needed? Please let me know what pins will be most useful from the P8 port. This will allow for a number of different way of communication between the FPGA and bone. Of course any of the other pins connected to the FPGA can be directly mapped to the Bone or indirectly accessed from within the FPGA.I also want clarify that this platform and any hardware or code developed will be open source. I want to make it clear that I am not in this for myself, but to further the ability for users to easily interface between popular embedded platforms and FPGAs.Mike
I am looking for individuals that would be interested in being a beta tester for the FPGA MARK-1. The platforms that the MARK-1 is intended to interface with are: 1) Arduino; 2) Raspberry Pi; and 3) Beagle Bone. (See link to the FPGA MARK-1 project page for more details on the design.)
I am looking for individuals that would be interested in being a beta tester for the FPGA MARK-1. The FPGA MARK-1 is a highly configurable FPGA platform that is intended to be used as an independent FPGA development board or as an add-on (shield) to existing embedded platforms. The platforms that the MARK-1 is intended to interface with are: 1) Arduino; 2) Raspberry Pi; and 3) Beagle Bone. (See link to the FPGA MARK-1 project page for more details on the design.)
I took some working prototypes to Maker Faire New York to see what people thought and to get feedback on changes that users would like to see. I have made some changes including adding interfacing options for the Raspberry Pi and Beaglebone and have added a high speed data port for high bandwidth applications such as SDR (Software Defined Radio), high speed ADC, video, etc. I am going to be fabricating Beta boards with the changes and would like to have them tested for any required changes before going to production.
I need Beta testers that are proficient in working with the Raspberry Pi, Beaglebone or Arduino. The users need to have some experience in working FPGA’s. I would like the users to experiment with the FPGA Mark-1 interfacing options to one of the listed platforms, get some code examples running on the interfacing platform, and give me feedback on any errors in the design or changes that they would like to see based on their experience. I will supply the users with the FPGA MARK-1 Beta boards and give them a final production unit once fabricated.
I would like to see some existing projects that the users have developed to show that they are proficient in working with one of the listed platforms. I would also like see some FPGA work to show me that they have some experience in working FPGA’s. Please email with these items and I will talk to you further about being a Beta tester.
I would be happy to hear from anyone that may have opinion, insight or suggestion that they would like to share.
Michael Jones
The one thing with the beaglebone is the EEPROM to identify the cape. I don't see you having a connection to the beaglebone's I2C bus for that
That's also why I promote the high-speed ADCs with LVDS outputs.