Question about the energy estimate and operating frequency setup

[QiLin Si]

Hi,

How could we customize the operating frequency(fs)? There is no variable declared about frequency in options.py. (You mentioned .lib file to modify the frequency in previous reply. But I could not find any file about .lib )

In the report ("*.html") generated after running py script, there are reading/writing power and leakage power. If I want to estimate the energy, I should use the function:

(eg: I assume total running time is 1s and memory accesses are 10 times.)

energy = 

reading_power*rising_time*memory_accesses + leakage_power*total_time

which is 

8.6022*10**(-3) * 0.009*10**(-9)*10 + 0.001288*10**(-3)*1

*time

[Matthew Guthaus]

Hi,

The rising and falling times shouldn't be used, I think. The characterization of power is done at the maximum frequency, I believe. However the rest looks reasonable. You could also look at the .lib file power table -- I'm not sure what your comment about it means.

Be aware that simulated power numbers aren't very good. These change pretty drastically even between different spice simulators for various reasons.

Matt

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[QiLin Si]

Hi Dr. Matthew,

Thanks a lot for your reply. 

From your post, we could not customize the operating frequency shown on the report (eg. the max frequency is 157MHz. My system only need 50MHz clock.) since "OpenRAM" will automatically simulating under the maximum frequency. 

So when we calculate energy for dynamic power(rising/falling) we should use the equation:  maximum frequency divides the reading_power then multiplies the access_time.  (reading_power/fs*memory_accesses ). 

Best regards,

Lin

[QiLin Si]

I just want to update the energy function. The new function is "reading_power/fs*memory_access+0.5*capacitance*voltage^2*rising_time*memory_acess +  leakage_power*total_time". The capacitance could be found in generated ".lib" file.

[QiLin Si]

Hi, Dr. Matthew,

I am using tech lib "freepdk45" to generate multiple banks SRAM with 1 r/w port. But there will be error if I do not set variable "num_banks" as 1 in "myconfig.py". In your ICCAD paper, you showed the multi-bank SRAMs in tech lib freepdk45 in Fig.4. Is there any problem for the code in myconfig.py file? No matter what values rather than 0 are set to "num_banks", there will be error reported. 

Thanks,

Lin