simple and true dual port ram

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Cagri

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Jan 6, 2020, 12:05:54 PM1/6/20
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Hi,

Does someone know if I can use freePDK45 to generate simple and true dual port rams? I tried to use num_rw_ports option but I have an error. I doubt that this freePDK45nm technology does not support it.

Thanks in advance.
Cagri

Matthew Guthaus

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Jan 6, 2020, 12:13:48 PM1/6/20
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Hi Cagri,

Yes, we support single and dual port. I'm not sure what you mean by "true" dual port -- maybe non-multiplexed? If so, yes.

You can see some examples in our example_config directory for different scenarios:
openram/compiler/example_configs

Matt


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Cagri

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Jan 8, 2020, 5:56:10 AM1/8/20
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Thanks for the rapid answer and this helpful openRAM project.

By saying true dual port ram, I meant that read and write access to the memory are allowed an either ports of the ram.

When I enable num_rw_ports = 2 in my config file, I received this error: ModuleNotFoundError: No module named 'dummy_bitcell_2rw_'. Do we need to generate this dummy_bitcell files for each configuration seperately?

Regards,
Cagri

On Monday, January 6, 2020 at 6:13:48 PM UTC+1, Matthew Guthaus wrote:
Hi Cagri,

Yes, we support single and dual port. I'm not sure what you mean by "true" dual port -- maybe non-multiplexed? If so, yes.

You can see some examples in our example_config directory for different scenarios:
openram/compiler/example_configs

Matt


On Mon, Jan 6, 2020 at 9:05 AM Cagri <acba...@gmail.com> wrote:
Hi,

Does someone know if I can use freePDK45 to generate simple and true dual port rams? I tried to use num_rw_ports option but I have an error. I doubt that this freePDK45nm technology does not support it.

Thanks in advance.
Cagri

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Matthew Guthaus

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Jan 8, 2020, 8:08:43 AM1/8/20
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Which version (commit id) of OpenRAM are you using? Did you modify it in any way? Please use the most recent version. I can't replicate this problem, this should work.

Matt

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Matthew Guthaus
Associate Dean of Graduate Studies
Professor, Computer Science & Engineering
Baskin School of Engineering
University of California Santa Cruz
https://www.soe.ucsc.edu/people/mrg
On Wed, Jan 8, 2020, 02:56 Cagri <acba...@gmail.com> wrote:
Thanks for the rapid answer and this helpful openRAM project.

By saying true dual port ram, I meant that read and write access to the memory are allowed an either ports of the ram.

When I enable num_rw_ports = 2 in my config file, I received this error: ModuleNotFoundError: No module named 'dummy_bitcell_2rw_'. Do we need to generate this dummy_bitcell files for each configuration seperately?

Regards,
Cagri

On Monday, January 6, 2020 at 6:13:48 PM UTC+1, Matthew Guthaus wrote:
Hi Cagri,

Yes, we support single and dual port. I'm not sure what you mean by "true" dual port -- maybe non-multiplexed? If so, yes.

You can see some examples in our example_config directory for different scenarios:
openram/compiler/example_configs

Matt


On Mon, Jan 6, 2020 at 9:05 AM Cagri <acba...@gmail.com> wrote:
Hi,

Does someone know if I can use freePDK45 to generate simple and true dual port rams? I tried to use num_rw_ports option but I have an error. I doubt that this freePDK45nm technology does not support it.

Thanks in advance.
Cagri

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https://openram.soe.ucsc.edu
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--
Matthew Guthaus
Associate Dean of Graduate Studies
Professor, Computer Science & Engineering
Baskin School of Engineering
University of California Santa Cruz

--
https://openram.soe.ucsc.edu
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Matthew Guthaus

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Jan 8, 2020, 8:29:22 AM1/8/20
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By default, we come with custom bitcells for 1 rw,1 r and 1 w,1 r, but this should trigger the parametrized bitcell which is much less dense. 

Note that there may be issues with write through, writing and reading to the same address. I recommend that you double check this.

Maurizio Martina

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Apr 16, 2020, 8:01:14 PM4/16/20
to OpenRAM User
Hi,
I have a similar problem with the freepdk45.

I can generate 1rw RAM and 1rw_1r RAM as in the examples.

However, when trying 2rw RAM (a) or 1w_1r RAM (b) I got the following errors:
(a) ModuleNotFoundError: No module named 'dummy_bitcell_2rw_'
(b) AssertionError

The configuration files are set as:
(a)
num_rw_ports=2
num_r_ports=0
num_w_ports=0

(b)
num_rw_ports=0
num_r_ports=1
num_w_ports=1

I tryed v1.1.4 and v1.1.5 but with both I get the same error message.

Am I making something wrong ?

Many thanks,
Maurizio
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