OpenRAM Dev error

[Rongmei CHEN]

Hi Professor,

  I did work on OpenRAM stable version and it worked. But when I shifted to OpenRAM Dev by the same setup I found the following error during simulation. Are there some difference between these two versions regarding setup? 

WARNING: file globals.py: line 208: Using the parameterized bitcell which may have suboptimal density.

Traceback (most recent call last):

  File "/imec/users/chen51/openram/compiler/sram_factory.py", line 55, in create

    mod = self.modules[module_type]

KeyError: 'dummy_bitcell'

During handling of the above exception, another exception occurred:

Traceback (most recent call last):

  File "/imec/users/chen51/openram/compiler//openram.py", line 74, in <module>

    name=OPTS.output_name)

  File "/imec/users/chen51/openram/compiler/sram/sram.py", line 46, in __init__

    self.s.create_netlist()

  File "/imec/users/chen51/openram/compiler/sram/sram_base.py", line 95, in create_netlist

    self.add_modules()

  File "/imec/users/chen51/openram/compiler/sram/sram_base.py", line 295, in add_modules

    name="bank")

  File "/imec/users/chen51/openram/compiler/modules/bank.py", line 52, in __init__

    self.create_netlist()

  File "/imec/users/chen51/openram/compiler/modules/bank.py", line 61, in create_netlist

    self.add_modules()

  File "/imec/users/chen51/openram/compiler/modules/bank.py", line 371, in add_modules

    bitcell_ports=self.all_ports)

  File "/imec/users/chen51/openram/compiler/sram_factory.py", line 82, in create

    obj = mod(name=module_name,**kwargs)

  File "/imec/users/chen51/openram/compiler/modules/replica_bitcell_array.py", line 45, in __init__

    self.create_netlist()

  File "/imec/users/chen51/openram/compiler/modules/replica_bitcell_array.py", line 56, in create_netlist

    self.add_modules()

  File "/imec/users/chen51/openram/compiler/modules/replica_bitcell_array.py", line 104, in add_modules

    replica_bit=replica_bit)

  File "/imec/users/chen51/openram/compiler/sram_factory.py", line 82, in create

    obj = mod(name=module_name,**kwargs)

  File "/imec/users/chen51/openram/compiler/modules/replica_column.py", line 37, in __init__

    self.create_netlist()

  File "/imec/users/chen51/openram/compiler/modules/replica_column.py", line 42, in create_netlist

    self.add_modules()

  File "/imec/users/chen51/openram/compiler/modules/replica_column.py", line 71, in add_modules

    self.dummy_cell = factory.create(module_type="dummy_bitcell")

  File "/imec/users/chen51/openram/compiler/sram_factory.py", line 57, in create

    c = reload(__import__(module_name))

ImportError: No module named 'dummy_bitcell_2rw_'

[Matthew Guthaus]

Hi Rongmei,

It cannot find the dummy_bitcell.gds/sp. This was added in the newest version due to the inclusion of the replica bitline into the main bitcell array. Previously, it was separate in the control logic which is bad for tracking variation/lithograpy reasons so we added it to the main array. This required the addition of a dummy bitcell that loads the wordline but does not drive the bitlines ever. 

Matt

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Matthew Guthaus

Associate Dean of Graduate Studies

Professor, Computer Science & Engineering

Baskin School of Engineering

University of California Santa Cruz

https://www.soe.ucsc.edu/people/mrg