EZ verilator setup

[Antti Lukats]

Hi

if you want it fast and easy:

https://github.com/micro-FPGA/engine-V/tree/master/verilator/ez_test

there are all files needed to setup and compile verilator stuff and output messages from uart to console from verilated

by using those files you only need to put your soc instance into tb

there is no need to modify any other testbench files or write single line of c code for verilator

(you can change baudrate in baudgen.v)

yess I know, there are so many nice things that can be done in c++ in verilator, I wish I would have time to learn it more during the contest timeframe..

anyway, if it helps any, its an easy setup i think.. I should have done it much earlier, I did keep saying it, and did not do, would have saved time..

br

Antti