M3 Assisted Boot, C code and linker and "helping others"..

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Antti Lukats

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Nov 19, 2018, 11:16:34 AM11/19/18
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Hi


it is also a bit random, but I pushed it online, in case it comes handy, available there is

c code for assisted boot for the M3
linker script that frees the bottom 64K of SRAM (M3 is forced to top 16K of 80K total)

eNVM_clients.png



BOOT_ASSIST is M3 code, it 
1) copies MF8A18_RV32I to Fabric LSRAM
2) copies RISC-V application from eNVM to eSRAM
3) toggles GPIO as active low softCPU reset

its not well documented. but its the best I can do today to help others to move on, if they desire to use m3 assisted boot.

and please dont ask how much time it did cost to get that far, it is amazing how many stupid makes one can make. Now when it is working it seems all so simple.

There is demo programming file too, it runs philosophers and uses

350 LUT (actual luts, not counting the interface luts) 430 LE
1 uSRAM
1 LSRAM

I need to go entertain some guests and have a something to eat-drink

complete AHB wrappers for this thing are all about 18 lines of significant HDL code and consume 1 LUT and 19 DFF...

g
Antti

Bryce Feigum

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Nov 21, 2018, 12:59:38 PM11/21/18
to RISC-V Soft CPU Discussion
Thank you Antti! I'm also using the eSRAM and I was wondering how I was going to throw this together in time, but this is excellent. I just got the compliance tests running in simulation and was planning to move to HW today. I'll give this a shot!

Antti Lukats

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Nov 21, 2018, 1:11:52 PM11/21/18
to RISC-V Soft CPU Discussion


On Wednesday, 21 November 2018 18:59:38 UTC+1, Bryce Feigum wrote:
Thank you Antti! I'm also using the eSRAM and I was wondering how I was going to throw this together in time, but this is excellent. I just got the compliance tests running in simulation and was planning to move to HW today. I'll give this a shot!


try it may be possible to simulate in libero modelsim, but I connected my AHBwrapper to ahb-to-axi and then AXI bram, for simulation, all with pure mouse work, no code lines writtten for tb with Viviado

only when it worked in vivado, I tried on microsemi, tried the simulator also but, then it worked without simulation needed

AHB is really simple, ah, I did not say, wait let me show

sd_mss.png


MSS exposes raw FIC_0 configured as AHBlite (default) AHBWOM is microwrapper to let M3 to write to fabric ram, you see the TPSRAM, RAM32KAHB wraps sync ram to AHB for eSRAM, the sources for those blocks are in github to look

top is the softCPU, so its actually pretty simple :)
MSS config is just click click and go, 
M3 softand linker script in github
the wrapper are really minimal close to no resources.

g
Antti




br
Antti

Bryce Feigum

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Nov 21, 2018, 1:22:57 PM11/21/18
to RISC-V Soft CPU Discussion
I went the same route as you for simulation. I couldn't find good documentation on the interface to the eSRAM so I had to try things out in Modelsim first and then I built a BFM to use with Verilator that SHOULD work :) 

Btw, what pin is UART connected to on the CreativeBoard for the STP you posted? I've been probing all the pins and can't find it. I just want to convince myself I can get my setup working before I start integrating my own solution.

Antti Lukats

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Nov 21, 2018, 2:30:26 PM11/21/18
to RISC-V Soft CPU Discussion
It is the onboard ftdi uart just open terminal 115200 and it shows up
Antti

Bryce Feigum

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Nov 21, 2018, 3:48:21 PM11/21/18
to RISC-V Soft CPU Discussion
I was able to build a new project from scratch and build the bootloader in SoftConsole and everything works great. Thanks again, Antti, you have saved me enormous time. Your name will be at the top of my bootloader.

Tommy Thorn

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Nov 22, 2018, 12:13:59 AM11/22/18
to Bryce Feigum, RISC-V Soft CPU Discussion
I’m confused by something, maybe someone here knows the answer: when I on CentOS 7 with Libero programs the Microsemi creative board, how can I access the serial port?  The only way I found to work is to force load ftdi_sio and manually add the vendor/product pair to bind the device to that, but then I have to unload it again to program.  The whole thing seems so cumbersome that I suspect I’m missing something.

Tommy
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Antti Lukats

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Nov 22, 2018, 4:52:15 AM11/22/18
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On Thursday, 22 November 2018 06:13:59 UTC+1, tommy wrote:
I’m confused by something, maybe someone here knows the answer: when I on CentOS 7 with Libero programs the Microsemi creative board, how can I access the serial port?  The only way I found to work is to force load ftdi_sio and manually add the vendor/product pair to bind the device to that, but then I have to unload it again to program.  The whole thing seems so cumbersome that I suspect I’m missing something.

Tommy

1) lets be correct you are talking about Future Creative board with Microsemi FPGA :)

the problem you describe is real and there is no workaround possible, you do have to disable and re-enable FTDI D2XX support (required for Libero) to be able to talk the virtual serial port.

This makes it virtually impossible to use Linux host for development, it is so annoying that I would immediately go to saturn/walmart and buy extra winPC to avoid this headache. The price of that dev-winpc would be worth my time in frustration.

I can not say what is the root cause for this, the developers of Quartus support for FTDI based JTAG adapters say that this is because of problems with Linux drivers and a workaround is not at all possible (because of major issue withing linux driver system).

I know the linux folks say that there is no issue related to Linux/drivers.

Be it so or so, at the moment there is a co-existance problem between D2XX drivers and VCP (virtual serial port) on Linux.

On Windows such problems do not exist, Philosophers UART messages just stop during the programming by Libero and restart when its done.

When I first heard that this basic and simple functionality is not at all possible on Linux system because of issue with linux driver system I was almost not believe this claim.

Sorry Tommy, 
I can not fix linux drivers D2XX issues for you, and also not for the judges, they will go crazy if they really want to re-flash and verify UART on same linux host.

OTOH - Lattice and Gowin USB JTAG adapters do not include the "load D2XX" bit in the EEPROM, and those load VCP for all channels, maybe here is theretical possibilty to actually use JTAG/D2XX and UART on same FTDI chip on linux.

To all - please do not blame Microchip/Microsemi, or Future Electronics or Lattice on this issue, it is not related to those companies, the problem is deeper in the FTDI/Linux system.

br
Antti
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