Need help with compliance tests.

[Ryan Voo]

Hi,

I need some help, I've got an implementation running with UART and some memory mapped registers on an iCE40 Ultra Plus FPGA, and I can simulate it using Verilator. My problem is I don't know how to run the compliance tests on an FPGA platform. Is there a guide as to how to do this?

p.s. This is a hobby project of mine, the engineering degree in my University doesn't teach us about computer architecture so everything I know came from online resources and books. I've been bombarded by a ton of  coursework lately so I'm really busy but I still hope I can at least make a submission, so I would really appreciate any help I can get, thanks.

Ryan

[Antti Lukats]

Read other postings and look other entries, basically you add sigature dump to uart code, this available bit i cant give url from handy
Antti