Attendees: Jeff, Rafael (new RISC-V TPM), Thea, Heinrich, Yu Bo, Chris Taylor (Tactical Labs), Daniel
Board Updates:
None
Program Updates:
Debian
Manuel A. Fernandez Montecelo and aurel32 has been using deploing buildd/portbox. OSUOSL are being slow in setting it up the one there. Another location for machine is unknown.
Starfive VF2 supports Debian(WIP)
Canonical
Awaiting StarFive V2 enablement upstreaming
Starting to look at Polarfire board enablement
oreboot
Getting to unifying the whole initialization part of firmware into a single stage (conceptually) on the JH7100 (WIP, draft PR https://github.com/oreboot/oreboot/pull/606 )
D1 can boot with and without SBI (PR for the latter pending, https://github.com/oreboot/oreboot/pull/604 )
Firmware
https://linux-sunxi.org/Category:D1_Boards lists build steps and repos for each of the boards, with U-Boot and for some boards oreboot as possible options
Citing https://linux-sunxi.org/Allwinner_Nezha#Mainline_kernel
“NOTE: As of 2022-11-01, this branch includes full U-Boot SPL support, so using the BSP boot0 or a TOC1 image is no longer necessary.”
RISC-V
Exchange is being used to collect/catalogue chips, hardware, software, services
Meeting cadence:
1st Thursday - Far East Friendly - 12:00 UTC
3rd Thursday - West Friendly - 15:00 UTC
ICE-V Program started (website)
Purchased 20 boards
Form solicitation ends Nov. 15 (1 submission so far)
Likely need to partner with Academic Partners to fill projects
VisionFive V1 second buy shipments shipped, most pkgs delivered (21 of 25)
Prioritizing the remaining inventory against requests
What’s cool?:
RiVAI Vector DSP IP Families: https://riscv.org/blog/2022/10/rivai-technologies-announced-new-products-in-their-risc-v-vector-dsp-ip-family-rivai-v7-and-rivai-v9-rivai-technologies/
More RISC-V Android news: https://riscv.org/blog/2022/10/first-patches-from-alibaba-cloud-enable-android-open-source-project-on-risc-v-han-mao-and-david-chen-alibaba-could/
HN discussion of Intel SiFive Horsecreek Demo: https://news.ycombinator.com/item?id=33129355
ARM is the new RISC/UNIX, RISC-V is the New ARM: https://www.nextplatform.com/2022/09/22/arm-is-the-new-risc-unix-risc-v-is-the-new-arm/
CHERI for RISC-V: https://www.cl.cam.ac.uk/research/security/ctsrd/cheri/cheri-risc-v.html
Microsoft security is engaging with CHERI-RV: https://msrc-blog.microsoft.com/2022/09/06/whats-the-smallest-variety-of-cheri/