Meeting August 17, 2023

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Jeff Scheel

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Aug 16, 2023, 6:23:32 PM8/16/23
to RISC-V Development Board Program
All,

Our next meeting will be this Thursday, August 17, 2023 at the following time:
  • 3:00 PM UTC,  
  • 4:00 PM Central Europe time,
  • 8:30 PM India Standard Time,
  • 11:00 PM China Standard Time
  • 11:00 AM Eastern U.S. Daylight Savings Time,  
  • 8:00 AM Pacific U.S. Daylight Savings Time.
Here's the meeting link (which can be copied to your calendar):
https://www.google.com/calendar/event?eid=MnRoZWRxcW9vNjg2MXQxcHZlNnVla3Eza2lfMjAyMzA4MTdUMTUwMDAwWiB0ZWNoLm1lZXRpbmdzQHJpc2N2Lm9yZw&ctz=UTC

The agenda will not include any special topics and will be simply:
  • Program updates from RISC-V
  • Board and Project updates
  • What's cool?
As always, any topics, updates, or information can be added to our agenda document, Dev Board Group Minutes or raised at the beginning of the meeting.
-Jeff

--
Jeff Scheel (he/him/his)
Director of Technical Programs, RISC-V Foundation

Drew Fustini

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Aug 17, 2023, 12:07:06 PM8/17/23
to Jeff Scheel, RISC-V Development Board Program
From our discussion, there is very helpful and active chat group on Telegram:
"Mainline Linux for RISC-V": 284 members, 53 online
https://t.me/joinchat/551j3yJa09owZTA1

Discussion goes beyond just the mainline kernel and discusses all the
different risc-v dev boards including what images to use and how to
get various peripherals working.

Cheers,
Drew

Jeff Scheel

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Aug 17, 2023, 12:09:37 PM8/17/23
to Drew Fustini, RISC-V Development Board Program
Thanks, Drew!!!  I've added to our meeting document at the top.

--
Jeff Scheel (he/him/his)
Director of Technical Programs, RISC-V Foundation

Jeff Scheel

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Aug 22, 2023, 9:03:29 AM8/22/23
to RISC-V Development Board Program
Another great meeting.  Welcome to all the new people.

As always, the official updates are in the Meeting Document and I'm attaching a copy here.  Please don't hesitate to question, correct, extend the information in either the document of this email.

Attendees: Jeff, Wei Fu (Fedora), Yu Bo (PLCT, Debian), Daniel, Carl Perry (Individual, RISC-V Advocate),  Tsukasa Ol (Individual, toolchain developer), Andreas Färber (SUSE, TPM), Axel (Individual, seL4 enthusiast), Drew (Baylibre, BeagleBoard), Bob Monkman (SiFive), Bing Yu (Andes), Rafael (RISC-V), Felix (Arch Linux)


Board Updates:

  • Alibaba

    • See discussion next time.

  • Beagle

    • Work underway on Fedora image.  Debian soon to start.  Ubuntu done.

  • Milk-V


Program Updates:

  • Arch Linux

    • Electron (VSCode, Element, and many others) finally works and Linux kernel has been adjusted to fix multiple configuration related issues.

    • An experimental kernel has been provided for SG2042 boards, built from vendor kernel tree (upstreaming work hasn’t really started yet) but larged cooperated with Arch’s kernel configurations.

    • Submitted a patch for a newly introduced regression in 6.4+ kernels about seccomp/ It's merged just now. https://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux.git/commit/?id=52449c17bdd1 

    • Much more boards are up and running at my apartment now that still awaiting for upstreaming work. (LeapFive InFive Poros, Milk-V Mars, Milk-V Duo, Milk-V Pioneer, LicheePi 4A, …)

  • Debian

  • Fedora

    • Fedora 38 Package number 22164/22951 [96.57%](less 800 srpms left)

    • RV32 bootstrap going well, building rpms for minimal rootfs

      • dnf works well on RV32

  • We will find a hardware to try after summit

  • Working on s64ilp32



  • SUSE

    • Awaiting Pioneer Boxes from Milk-V.

  • oreboot

    • Work on QEMU/virt has been picked up again: https://github.com/oreboot/oreboot/pull/703 

    • With Go 1.21 RC2, we could successfully boot Linux on JH7110 / VisionFive 2

      • kexec is lacking alignment though

      • Ethernet driver is hanging at MDIO write; we’re investigating

  • Firmware

    • Daniel will be talking on RISC-V at OSFC, schedule is WIP; https://osfc.org 

      • Title: “Aligned on RISC-V” - will cover aligned memory access, but also alignment of stack components

  • RISC-V

    • Jeff limited time due to new role.  Exploring how to transition the DevBoard program to ensure greater progress.

    • Distribution partner has requested to discontinue support  

      • We will use this opportunity to re-design the program to try and make more “self-service” once decisions are made.

      • Exploring “large” vendors like Amazon, FedEx.

      • Challenges include:

        • WW shipping, Delivered Duty Paid

        • Need some small warehousing space

        • Must be able to receive from China AND ship to China with U.S. dollars

        • Prefer to have “online shop” where units can be ordered with certificates.

      • Suggestions for shippers would be appreciated.

    • VisionFive V2

      • Approved shipment of 4 more “Second call” projects boards (4 projects)

      • Leaves 8 boards in inventory

      • Will check in 2 weeks at remaining projects

    • Pioneer Box

      • Requested shipment of next 3 boxes – SUSE and Yocto.

    • 10 Unmatched boards have also been offered by SiFive

      • Boxes received, allocations figured out - Debian (2) SUSE (3), Gnome (2), OSU/OSL (3).

      • Plan to start shipping soon.

    • ROMA has reached out and offered to ship first 2 laptops

    • We had the first physical meetup in Duisburg at Fraunhofer (6th meetup overall)


What’s cool?:


Miscellaneous notes:

  • Next session Alibaba (David Chen) will speak about their new cores and products

  • Join the team in the RISC-V #devboard-community (link)


-Jeff

--
Jeff Scheel (he/him/his)
Director of Technical Programs, RISC-V Foundation

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