Welcome to the RISC-V Pioneer Box Projects

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Greg Sterling

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Jul 29, 2024, 11:58:08 AMJul 29
to RISC-V Developer Board Community

All,


I'd like to welcome the new Pioneer Box DevBoard recipients to our DevBoard Community.  We are the first place for RISC-V DevBoard projects to gather information about their boards and to help each other be successful.


We are aware that people are receiving systems ahead of tracking information, and are working to get more information from the supplier.


For the new projects, you'll find the Pioneer Box specific information on our "Programs" page:

https://sites.google.com/riscv.org/devboards-program/programs


Additionally, you'll find general RISC-V software ecosystem information which pertains to all boards on our "Library" page, here:

https://sites.google.com/riscv.org/devboards-program/library


As you begin working with your boards, please feel free to reach out to this community with questions, suggestions, feedback etc.


Also, keep your eyes open for the monthly status report requests (via Google form).  These generally get sent out the last week of the month and should take you no more than 5 minutes to complete.


Thanks for your support of RISC-V!  Please let me and us know how we can help you be successful.


Greg Sterling (RISC-V International)

Tommaso Boccali

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Aug 1, 2024, 4:21:39 AMAug 1
to Greg Sterling, RISC-V Developer Board Community
Ciao, I got the Pioneer happily running and I already started benchmarking (we have a talk at the Computing in High Energy Physics Conference in Krakow, October).

I am afraid I know the answer, but let me try and ask: since I need power measurement, I am using a metered plug. No chance to get IPMI running, is this correct?

thanks a lot

tom

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Tommaso Boccali
INFN Pisa

Nick Brown

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Aug 1, 2024, 4:49:16 AMAug 1
to Greg Sterling, tommaso...@cern.ch, RISC-V Developer Board Community
Hi Tom,

I asked SOPHGO about this last year, and they said that the CPU didn't have power measurement that we could get access to in software unfortunately. I'm not sure if there is any hardware on the chip that provides this at all but isn't visible to the SW.

Cheers,
Nick


From: Tommaso Boccali <tommaso...@gmail.com>
Sent: 01 August 2024 09:20
To: Greg Sterling <gr...@riscv.org>
Cc: RISC-V Developer Board Community <devboard-...@riscv.org>
Subject: Re: Welcome to the RISC-V Pioneer Box Projects
 
This email was sent to you by someone outside the University.
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Tommaso Boccali

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Aug 1, 2024, 4:54:13 AMAug 1
to Nick Brown, Greg Sterling, RISC-V Developer Board Community
thanks, that is what I was assuming, but now I am fully convinced :)

thanks

tom
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