[RISC-V][Devboards Program] March 6, 2025

[Greg Sterling]

Greg Sterling <gr...@riscv.org>	Wed, Feb 19, 2:24 PM
to RISC-V

All,

Our next meeting will be tomorrow, March 6, 2025.  Local times can be found by logging into LFX at https://lfx.linuxfoundation.org/tools/ or going to the Tech Meetings calendar at https://tech.riscv.org/calendar/.

The agenda will focus on standard topics:

• Program updates from RISC-V
• Board and Project updates
• Future Board Program Discussion
• What's cool? (time permitting)
  

Any topics, updates, or information can as always either be raised at the beginning of the meeting or by adding it to our agenda document, Dev Board Group Minutes.  Please note we have migrated to Confluence for meeting minutes.  Please reach out if you have any issues viewing the meeting minutes.

Thanks, and I look forward to seeing you tomorrow!

Greg Sterling (RISC-V International)

To join via Zoom:

https://zoom-lfx.platform.linuxfoundation.org/meeting/95070821313?password=39bff860-bd17-4cd2-bab2-57e9e3e445e8

[Greg Sterling]

All,

Below are the meeting minutes for the March 6th meeting.

Thanks all for your great contributions.  Look forward to seeing you soon!

Greg Sterling (RISC-V International)

Notes & Action Items

Board Updates:

·       SiFive - press

o     How The Ubuntu Linux Performance Has Evolved For SiFive Over the Last Four Years - link

·       Milk-V - announcements

o   Running Deepseek R1 Distill with llama.cpp on Milk-V Pioneer Box - link

Program Updates:

·       SUSE

o   For SUSE, we're experimenting with integrating the Pioneer boxes into our build service/system infrastructure instead of QEMU on x86_64.

·       oreboot

o    We got Linux to boot on the K230 

§  Turns out, the "debug register" for the timer was really the normal timer control register after all (STC = System Timer Clock), I just mixed up the columns in the manual again; though the explanation there is still confusing and inconsistent and it doesn't say anything about being related to the mtimer (RISC-V platform timer)

§  Had to add some more helpers, now have shared libraries for XuanTie and RISC-V

§  Did another Twitch live development stream, started a new series with the K230: https://www.youtube.com/watch?v=hfz8QBB4M3g

o   We are cleaning up a lot in oreboot 

§  Ripped out tarpaulin (test coverage report)

§  Removed obsolete Makefiles and targets

§  Upgraded to Rust nightly 2025-03-01

o   Discussed compression in oreboot, we'll switch to miniz_oxide

·       RISC-V

o   Developer Board Status

§  Monthly Status Report

§  Final Status Report

o   15 Minute Demos?

o   Running SAIL/ACT Tests on RISC-V Hardware?

o   Ecosystem Lab Partners

§  EPCC has provided a one pager to get access to their hardware, interested in getting more people access to their platform.

 

What’s cool?:

·       The RISC-V Architecture: 16 Boards and MCUs You Should Know - link

·       Alibaba launching server-grade RISC-V CPU - link

·       The Role of RISC-V in Shaping the Future - link

·       blog on running swupdate on licheepi 4a:

https://kanakshilledar.github.io/2025-03-06/licheepi-4a-swupdate

·       There was a Tenstorrent talk about their Ascalon processor and their future high perf CPU plans: https://riscv.or.jp/wp-content/uploads/Japan_RISC-V_day_Spring_2025_compressed.pdf

In the presentation, it was mentioned that they plan to release a devboard and laptop of their Athena chiplet with 8x Ascalon cores, presumably next year: https://youtu.be/ttQtC1dQqwo?t=1035 (timestamp)

Miscellaneous notes:

·        Meeting about some random Deepseek experiences (including MV Pioneer) in 2 weeks….  https://blu.org/

·       OrangePi just announced a RISC-V board, but it's once again the same JH-7110...

·       https://sbcc.io/

·       https://easybuild.io/tech-talks/007_scc_isc22.html