Hi,
I am interested in find further information which I am not finding the specifications of a register that can be coupled with another register in effect that can use a mask or equality for which is can raise a hardware IRQ like ear versions of Intel x86 process.
I typically would be looking for two such registers, unless there is a way to do bounds checking of variables concurrently with increment at zero CPU cycle overhead, to single integer add instruction.
Typically thinking I would like one register to monitor a lower bound for equality and the other and upper bound. which are then wire to raise a hardware IRQ that can then be used in software, to improve memory management for vectors or contiguous memory blocks, to avoid mem copies ideally as well as reduce the range checking require to detect vector or similar structure or mechanism that require to expanded or reduce its contiguous memory block.
My thoughts are that one could reduce the every iteration or a push bounds checking to a once of random IRQ software code block for a function to run, reducing the memory management overhead of conditionals, which for my use cases would be also a loop condition due to way structure a program. It would also reduce the total run length of a program, as those section of code can be excluded, creating a more compact core program logic.
My thoughts are that there may be other uses for these types of registers to speed things up. I realise that things are kind of complex under the hood, but never the less, my mind I find ask but why not.
I have done some assembly and VHDL basic chip design logic.
This is the closet information that I have found on this, other that what IDE offer.