Right, Zephyr is a lot of work, if you are working on the low level stuff of it. It might be a nice system for application programmers (never really tried it for this), but otherwise it is just too many different files in too many different places and with too many different formats, all to be edited by hand. Reminds me a lot to Linux kernel development, which I did some years ago.
And then on top of this, all the different tools. This is really hard for one person. Maybe the organizers should encourage more teamwork? Some people like Linux kernel development, some people like FPGA programming, and there might be even people who like to setup toolchains and utility programs like OpenOCD, and who are Linux gurus. But there are not many people who can or want to do it all.
As I suggested for the last contest, a Docker container with all the required tools would be nice. Meanwhile there are already some RISC-V toolchain containers, but I don't know if there is a container with a full setup with everything needed, including Zephyr, the toolchain, OpenOCD, and maybe even Eclipse and the Microsemi SoftConsole. It should be possible to test the example project (which was very helpful for this contest) without any manual additional installation or configuration steps, ideally just one script in a Docker container which uploads and runs it.
Regarding the FPGA IDE, I start to like Libero. So far for FPGA programming in general, I tried to do it all on the source code level, mostly with VHDL. But the SmartDesign concept allows me to use my own VHDL entities without problems, and easily connect them graphically with other own entities, or IP catalog entities. Long time ago I tried the Altera schematic entry, but this was terrible, especially if you change something. With SmartDesign, it is just one mouse click to update the component, and another mouse click for an auto-layout, which gives quite good results.
Of course, this introduces the problem that it will be difficult to port or use the design to other IDEs. I guess in the long run, the open source FPGA toolchains like IceStorm will become what is GCC now. Then you would need only one IDE for all platforms. This would be good for the manufacturers as well. Imagine all FPGA manufacturers would combine their work they invest in the IDE, in one open source project. This would reduce massively the individual cost per company, but the result would be a far better IDE than any individual company could do.
I think an ideal contest would look like this:
- No Zephyr required. This is just an additional hassle and doesn't really help developing cores, which I guess is what most people here (including me) are having fun to do. Just the RISC-V toolchain is sufficient.
- With no Zephyr, it would be (relatively) easy to create a fully working Docker container with all tools and a working example program. And additionally, it would be much easier for someone to replace parts in it, like with his/her own RISC-V core, which probably would only require to edit a linker config file, or replacing a driver, which would require just to edit one C file, and everything would be still working.
- On the FPGA side, a fully working, documented and open source concept for uploading your RISC-V binaries should be implemented. Maybe this can be done with the SoftConsole, but I tried to connect it with the JTAG-port of the VexRiscv core, and it didn't work. Is the RISC-V JTAG interface standardized? This would be really helpful. But something simple, like a program upload over UART, just with a simple Python script, would be easier. It should be as easy as the Arduino environment: It has a bootloader and with one mouse click you can compile and upload your program to it.
Apropos Arduino: wouldn't it be cool, if there would be an Arduino target for the Creative Board? This makes even more sense with the Arduino headers on the board. The boards could be delivered pre-programmed with a RISC-V core and Arduino bootloader, so all the normal application user has to do is to install the Arduino IDE to program and upload RISC-V programs. Imagine something like the Arduino MKR Vidor 4000, with some pre-programmed useful entities, like UART, SPI etc., and maybe some fancy entities like PWM audio output and VGA output. And the advanced user could change the FPGA configuration to add or change HDL entities, but can still use the very easy to use Arduino IDE for the software side. The 512 MB RAM would be very interesting for more complex Arduino projects as well.