Vincent Ulitzsch
unread,Jul 25, 2026, 6:40:52 PM (2 days ago) Jul 25Sign in to reply to author
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to Pavona, Zain Ul Abideen, Vincent Ulitzsch, Pavona, vin...@mit.edu, zabi...@uidaho.edu, Evan Apinis
Hi everyone,
We are very happy that Resiliator has gathered so much interest. We will get back to you with completed CLAs.
Let me address questions 1-by-1:
# Testbech and Security Property DefinitionResiliator indeed needs a testbench. The testbench needs to set a new GPIO output to values indicating "security property bypassed / not bypassed". For instance, for OpenTitan we implement the following:
We execute the bootrom that is loading a binary with a wrong signature and then:
- If the fault-injection gets the OpenTitan to execute an instruction from flash, the testbench sets the GPIO to "security property bypassed".
- If a major alert is raised, the testbench sets the GPIO to "security property not bypassed" (injection failed).
- If the instruction at the boot address is executed twice, we assume that the bootloader "jumped back", e.g., because of an invalid signature and also set the GPIO to "not bypassed".
Provided with this testbench (and the simulated RTL), Resiliator can conduct the simulations automatically.
# Pavona Verilator Flow@
Ryan Torok: Thanks for the pointers! We will look into this and get back to you with an adjusted GitHub release.
# Application to ACC@
Evan: For an example security property, see testbench. A note on the ACC:
The nice thing about the OpenTitan is that in the "SecureIbex" configuration,
_no_ single bit-flip should propagate, since the OpenTitan is protected by dual-core lockstep. That makes it easy to define a security property.
I am not sure whether we can also define such a clear-cut security property for the ACC core/or the ACC core executing a specific crypto implementation. Happy to have a call and discuss what exact security guarantees the ACC should provide, and then how we could test those.
- Vincent