[New paper] Lightweight Implementation of Saber Resistant Against Side-Channel Attacks

139 views

Skip to first unread message

unread,

Oct 31, 2021, 10:22:43 PM10/31/21

to pqc-...@list.nist.gov

Hi,

It is our pleasure to announce the publication of our new paper:

"A Lightweight Implementation of Saber Resistant Against Side-Channel Attacks"

by Abubakr Abdulgadir, Kamyar Mohajerani, Viet Ba Dang, Jens-Peter Kaps, and Kris Gaj

Cryptology ePrint Archive: Report 2021/1452

This paper will appear in the proceedings of Indocrypt 2021, to be held on December 13-15, 2021.

The major contributions of our paper are as follows:

1. We developed an SCA-resistant lightweight hardware implementation of Saber, which

occupies around 2.9x more LUTs and incurs 1.4x longer latency compared to our baseline unprotected design

when implemented on Xilinx Artix-7 FPGAs.

2. Our protected design was verified using a non-specific fixed-vs-random Test Vector Leakage Assessment (TVLA) method.

This method demonstrated the negligible probability of the first-order leakage for at least 100,000 traces.

3. Our masked hardware implementation offers 29x and 26x speedup over previously reported protected

software [1] and software/hardware [2] implementations, respectively.

Any comments and suggestions are very welcome!

Bakry, Kamyar, Viet, Jens, and Kris

Cryptographic Engineering Research Group (CERG)

George Mason University

References:

[1] Michiel Van Beirendonck, Jan-Pieter D’anvers, Angshuman Karmakar, Josep Balasch, and Ingrid Verbauwhede,

"A Side-Channel-Resistant Implementation of SABER," in ACM Journal on Emerging Technologies in Computing Systems,

vol. 17, no. 2, April 2021, pp. 1–26.

[2] Tim Fritzmann, Michiel Van Beirendonck, Debapriya Basu Roy, Patrick Karl, Thomas Schamberger, Ingrid Verbauwhede, and Georg Sigl,

"Masked Accelerators and Instruction Set Extensions for Post-Quantum Cryptography,"