Anecdote time - from my experience with EAGLE. Trying to treat lines on a schematic/PCB as if they were live entries in a netlist database is a terrible user experience. It treats the human operator like a machine that has to adhere to a very specific workflow. It can really get in the way - at least did for me.
I wonder how Mentor had been adjusting those connections? Schematics can be pretty dense sometimes, and moving a single wire to follow a pin will just overlap it with something else, or the routing of the wire won't succeed without manual intervention. If you could take some screen videos of Mentor doing it on HP-UX, perhaps it'd make it easier to see what behavior you're expecting. That would be IMHO a first step. And go for both a dense digital design as well as for a complex analog schematic, with op-amps and such.
How do you propose this feature would work on the first schematic below? Suppose I would modify the pin placement on any of the symbols - say op-amps, transistors, transformer, etc?
Next, how would it work on the second schematic below, where the routing grid is quite full and many reasonable wire paths are filled-up already?
I'm not trying to argue pro- or against, but rather understand how that feature actually works. I don't think it will be easy to convey without some screen videos though. Perhaps Mentor folks did something brilliant that we're unaware of?
If you're serious about perhaps getting it implemented, it will take some work on your part to specify the feature and marshal it through to completion. I wouldn't mind implementing something like that at least as a proof-of-concept. But that's still quite a way away.
Cheers, Kuba
P.S. The first schematic is a reverse-engineering of a Kepco power supply. The second schematic is one half of a nibble's worth of registers in a discrete 4000-logic Z80 implementation.
P.P.S. I apologize for the size of those schematic PNGs - about 1.5MB total. They'd be unreadable if I made them any smaller.