Hi All,
I’ve performed some RV32 with RVC testing this weekend and thought I would share results.
The riscv-meta simple ABI/AEE emulator now supports RV32IMAFDC in addition to RV64IMAFDC and both have been cross-checked with spike for all FPU instructions on RV32 and RV64 and combinations of RVC (privileged ISA is not there, however the emulator can run simple riscv-pk programs)
If you have an RV64 toolchain installed you can run the riscv-meta RV64 tests:
# run RV64 and RV64C tests with spike
# run RV64 and RV64C tests with the riscv-meta emulator
make test-emulate-rv64
make test-emulate-rvc64
If you have an RV32 toolchain installed you can run the riscv-meta RV32 tests:
# run RV32 and RV32C tests with spike
make test-run-rv32
make test-run-rvc32
# run RV32 and RV32C tests with the riscv-meta emulator
make test-emulate-rv32
make test-emulate-rvc32
Note: I synced to the latest toolchain and modified the build-rv32im.sh script in the riscv-tools priv-1.9 branch to build the RV32 toolchain using --with-arch=RV32IMAFD
Tested compilers
riscv-tools priv-1.9 branch
commit id: 65da94f84a2ba5a61a8bcf3ebdd8ca57f6d899ca
riscv32-unknown-elf-gcc (GCC) 6.1.0
riscv32-unknown-elf-g++ (GCC) 6.1.0
riscv64-unknown-elf-gcc (GCC) 6.1.0
riscv64-unknown-elf-g++ (GCC) 6.1.0
Observations
Some of these may be known issues.
RVC in riscv-meta
- The RVC encoding/decoding and emulation in the riscv-meta repo is working equivalently to spike/pk for complex test cases.
- The RVC decompress emulation was a critical path to isolate encoding issues vs relocation issues in the riscv-compress-elf tool I am working on.
- The tests revealed one bug in the riscv-meta RVC metadata for c.jal which is now fixed
64-bit integers in RV32 GCC (libgcc?)
- Some 64-bit integer arithmetic appears not to work with the RV32 gcc/g++ --with-arch=RV32IMAFD
- The test-sieve program is consistently wrong on spike and riscv-meta emulator so I suspect the compiler
- I have not had time to trace it but the test-sieve program should work the same on both RV64 and RV32
RVC in GCC
- Both 32-bit and 64-bit gcc compilers are not using RVC instructions for the whole executable
- This may be because the CRT is pre-compiled without RVC and the linker does not compress during link
- Work in progress riscv-meta compress-elf gets much higher compression ratios (although it still has relocation issues)
RVC in G++
- Both 32-bit and 64-bit g++ compilers are not outputing RVC instructions with the -mrvc flag (but the compiler accepts the flag). A known issue?
RVC in Spike
- There is a tiny RVC disassembly bug in the spike disassembler which I noticed is not fixed in the priv-1.9 branch. It’s a +2 -2 lines (see attached patch)
Cheers,
Michael.