VSTIP interrupt behavior

[Alex Mikhalevich]

I am implementing the hypervisor extension and have trouble understanding some portions of the specification related to the interrupts. 

According to the spec:  

> hvip is a register that a hypervisor can write to indicate virtual interrupts **intended for VS-mode**   

This register will be written in HS mode, thus the trap will happen in HS mode. However, according to the spec:  

> When a trap occurs in HS-mode ... it goes to M-mode, unless delegated by medeleg or mideleg, in which case **it goes to HS-mode**.  

Could anyone please clarify what happens when hvip.VSTIP is written in HS mode? What does the phrase ‘intended for VS-mode’ mean? Should the write to hvip.VSTIP be ignored until the machine switches to the virtual mode?

Thank you in advance.

[Jaume Gauchola]

Hi Alex,

As far as I understand, if you write to the hvip.VSTIP register in HS-mode, it could change the value of hip.VSTIP (which is an alias of mip, and at the same time vsip is an alias of hip... yes, a bit confusing). This assignment of hvip and hip is detailed on page 112 of the RISC-V privilege specification.



So, if I am not mistaken, the meaning of **intended for VS-mode** is that changing the values of the hvip register could have **colateral** changes to vsip (vsip-->hip-->mip). Then the hypervisor could inject and interrupt to the virtual machine (taking into account the hideleg register).

I hope it solves your doubts. If you have any questions, don't hesitate to ask!

Best regards,

Jaume Gauchola Vilardell 

Hardware Engineer, Semidynamics

[Vithurson Subasharan]

1. mideleg.VSTIP is read-only, as enforced by the specification. When this trap happens, it will always be taken to the hypervisor unless delegated to a virtual supervisor by the hypervisor.

2. When we are in machine mode and there is a pending VSTIP, it will be ignored, and context is switched to a privilege level this interrupt is delegated to.

3. Intended for VS-mode means it is intended to emulate a supervisor timer interrupt for a guest OS running in virtual supervisor mode. However, the hypervisor software has the option to either delegate it to the virtual supervisor by writing to hideleg.vstip or let the trap be taken in hypervisor mode itself.

Regards,
Vithurson

On Friday, June 9, 2023 at 12:51:55 AM UTC+2 Alex Mikhalevich wrote:

[Vithurson Subasharan]

1. mideleg.VSTIP is read-only, as enforced by the specification. When this trap happens, it will always be taken to the hypervisor unless delegated to a virtual supervisor by the hypervisor.
   
   

1. When we are in machine mode and there is a pending VSTIP, it will be ignored, and context is switched to a privilege level this interrupt is delegated to or lower.
   
   

1. Intended for VS-mode means it is intended to emulate a supervisor timer interrupt for a guest OS running in virtual supervisor mode. However, the hypervisor software has the option to either delegate it to the virtual supervisor by writing to hideleg.vstip or let the trap be taken in hypervisor mode itself.
   
   

1. Thanks,
   Vithurson

[Vithurson Subasharan]

Sorry for the messed up formating and repeated response, and in the first point I meant to say  mideleg.VSTIP is read-only 1.