Soft-Core IP for RISC-V

[KN Ganendra Murthy]

Hii all,

Is it possible to run embedded linux through RISC-V soft core IP implementation.How to implement a basic RISC-V 64 bit instruction set soft-core ip.Kindly suggest 

Thanks & Regards

KN Ganendra Murthy

[Tommy Murphy]

> Is it possible to run embedded linux through RISC-V soft core IP implementation.

Of course, as long as the implementation is Linux capable. Why would you think otherwise?

> How to implement a basic RISC-V 64 bit instruction set soft-core ip.Kindly suggest 

That's hardly something that could be covered in a mailing list post - especially with no outline scope (e.g. what HDL, what target (FPGA or other) platform etc.).

There are existing soft core IP implementations of RV64 available publicly. I would suggest that you start by studying some of those.

https://riscv.org/exchanges/cores-socs/

[Bruce Hoult]

Of course.

The original "rocket" RISC-V core has configurations that run Linux. So does vexriscv. So does CVA6. Probably others, but those are the best known.

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