We may need to document the Semihosting workaround for the EBREAK instruction into the ISA specs.

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mofo syne

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Jun 19, 2018, 2:15:15 AM6/19/18
to RISC-V SW Dev
Hi All,

Has there been any effort in documenting the riscv semihosting that is soon to be implemented into OpenOCD by Liviu Ionescu, which is a workaround the lack of explicit semihosting support in RISCV EBREAK command? 

```
  os_semihosting_call_host (int reason, void* arg)
  {
    register int value asm ("a0") = reason;
    register void* ptr asm ("a1") = arg;

    asm volatile (

        // Workaround for RISC-V lack of multiple EBREAKs.
        " .option push \n"
        " .option norvc \n"
        " slli x0, x0, 0x1f \n"
        " ebreak \n"
        " srai x0, x0, %[swi] \n"
        " .option pop \n"

        : "=r" (value) /* Outputs */
        : "0" (value), "r" (ptr), [swi] "i" (RISCV_SEMIHOSTING_CALL_NUMBER) /* Inputs */
        : "memory" /* Clobbers */
    );

    return value;
  }
```



While I understand there will be a future ISA revision that will address this oversight. There is still the issue that sifive silicon is already spun and thus cannot be updated. What would help at least is to prevent fragmentation of this semihosting workaround by documenting this approach into the documentation of the EBREAK instruction.

e.g. That the magic number for RISCV semihosting should be
#define RISCV_SEMIHOSTING_CALL_NUMBER 7
Currently Liviu Ionescu is waiting for a patch for the semihosting workaround to merge into OpenOCD master and will also discuss with SEGGER to implement similar capability. Getting this into the ISA documentation will help ensure that semihosting will remain reliable though-out the riscv line and older.

Cheers,
Brian K


Reference: https://forums.sifive.com/t/openocd-semihosting/748/14


Liviu Ionescu

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Jun 19, 2018, 2:58:01 AM6/19/18
to mofo syne, RISC-V SW Dev
On 19 June 2018 at 09:15:17, mofo syne (mofo...@gmail.com) wrote:

> Currently Liviu Ionescu is waiting for a patch for the semihosting
> workaround to merge into OpenOCD master

The semihosting code was updated in OpenOCD master

http://openocd.zylin.com/#/c/4518/18

and a patch to the RISC-V OpenOCD was already applied to use this code:

https://github.com/riscv/riscv-openocd/commit/5d9f48640461fbac5c30958f63a01e666ee64dd4

So, semihosting support is already available in the RISC-V OpenOCD
source code. It is functionally equivalent to what GNU MCU Eclipse
OpenOCD provided for some time.

> and will also discuss with SEGGER
> to implement similar capability.

Yes, I'll do this soon.

> Getting this into the ISA documentation
> will help ensure that semihosting will remain reliable though-out the riscv
> line and older.

Fully agree that this must be somewhere documented; some time ago I
suggested to the debug working group to consider adding the
semihosting call to their docs, but got no reply.


Regards,

Liviu

Megan Wachs

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Jun 19, 2018, 6:12:30 AM6/19/18
to Liviu Ionescu, RISC-V SW Dev, mofo syne
It’s currently documented here (along with some discussion on where it really belongs):


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Liviu Ionescu

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Jun 19, 2018, 8:03:49 AM6/19/18
to mofo syne, RISC-V SW Dev
On 19 June 2018 at 09:15:17, mofo syne (mofo...@gmail.com) wrote:

> ... will also discuss with SEGGER to implement similar capability

I provided all RISC-V semihosting details to SEGGER. They'll "consider
for implementation mid term (some time this year)".

Either me or Alex from SEGGER we'll let you know when a functional
implementation is available.


Regards,

Liviu

Palmer Dabbelt

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Jun 19, 2018, 4:08:02 PM6/19/18
to Megan Wachs, i...@livius.net, sw-...@groups.riscv.org, mofo...@gmail.com
This is an ABI and should be documented like our other ABIs. Putting this into
the debug spec conflates two things: the interface (that "slli x0, x0, N;
ebreak" pair) and the implementation (an external debugger). The best example
for how to document this would be a Linux ABI document, but we don't have one
so I guess you'll be on your own :).

This is one of those cases where ABI really means two different things:

* The calling convention and memory layout of structures. This is documented
in the ELF psABI spec.
* The interface to the host system, which would include both the mechanism for
transferring control (either "slli; ebreak" or "ecall"), the calling
convention (in both cases very similar to the C function calling convention,
so easy to document), and the set of available interfaces (system calls or
semihosting calls).

The second one is a very large document in Linux land, which is why we haven't
done it (it's also a bit redundant, as the vast majority of our interface is
already standard). It's a feasible and useful document to produce for the
semi-hosting use case, though.

If you'd like to have repo to document the ABI then just ask.
> To view this discussion on the web visit https://groups.google.com/a/groups.riscv.org/d/msgid/sw-dev/CAKnTnFRB5NYfS4_dYc747a2mok7Bj%3DVdayMBg3G-z-fmgDA99g%40mail.gmail.com.
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