Error: unrecognized opcode `custom0 x0,a5,2,0'

[Dragoș]

Good day!

I have updated rocket-chip to the latest commit and am experiencing errors during my normal tests of trying to run the dummy-rocc extension emulator and program.

I have removed the address to my root working directory, turning it into double dots '..' as to shorten the lines.

I'm running:

$ ../riscv-toolchain/bin/riscv64-unknown-elf-gcc ../rocket-chip/riscv-tools/riscv-isa-sim/dummy_rocc/dummy_rocc_test.c -o ../dummy_rocc_test.o

I get:

../rocket-chip/riscv-tools/riscv-isa-sim/dummy_rocc/dummy_rocc_test.c: Assembler messages:
../rocket-chip/riscv-tools/riscv-isa-sim/dummy_rocc/dummy_rocc_test.c:13: Error: unrecognized opcode `custom0 x0,a5,2,0'
../rocket-chip/riscv-tools/riscv-isa-sim/dummy_rocc/dummy_rocc_test.c:15: Error: unrecognized opcode `custom0 a5,x0,2,1'
../rocket-chip/riscv-tools/riscv-isa-sim/dummy_rocc/dummy_rocc_test.c:18: Error: unrecognized opcode `custom0 x0,a5,2,3'
../rocket-chip/riscv-tools/riscv-isa-sim/dummy_rocc/dummy_rocc_test.c:20: Error: unrecognized opcode `custom0 a5,x0,2,1'
../rocket-chip/riscv-tools/riscv-isa-sim/dummy_rocc/dummy_rocc_test.c:23: Error: unrecognized opcode `custom0 x0,a5,2,2'
../rocket-chip/riscv-tools/riscv-isa-sim/dummy_rocc/dummy_rocc_test.c:24: Error: unrecognized opcode `custom0 x0,a5,2,3'
../rocket-chip/riscv-tools/riscv-isa-sim/dummy_rocc/dummy_rocc_test.c:25: Error: unrecognized opcode `custom0 a5,x0,2,1'

I should mention that this isn't the first time I got this. First time I got this error was from a commit dated in the middle of November - I've then reverted to a commit at the beginning of October.

I don't have the exact dates as I haven't kept note of them. If it's necessary, I could find out the latest commit that worked for me but it would take time and would do it if someone deems it necessary.

Thank you!

[Stefan O'Rear]

On Wed, Dec 14, 2016 at 11:25 PM, Dragoș <drago...@gmail.com> wrote:
> ../rocket-chip/riscv-tools/riscv-isa-sim/dummy_rocc/dummy_rocc_test.c:13:
> Error: unrecognized opcode `custom0 x0,a5,2,0'

If you're using a toolchain from ~ September you can pass
-march=RV64GXcustom to make that work.

In the current toolchain:

https://github.com/riscv/riscv-gnu-toolchain/issues/190

https://github.com/riscv/riscv-binutils-gdb/issues/38

-s