Cheat Sheet about CPU registers and calling convention

[Viller Hsiao]

Hi all,

To get familiar with CPU architectures, I made a cheat sheet about the register map of RISC-V/ARM/MIPS/x86. The URL is

https://docs.google.com/spreadsheets/d/1wiQdwfjoTHqToluk-sJItZLjdZNmGH5PcmMA0de9AMI/edit#gid=385523813

Hope it's helpful.

Regards,

Viller

[Bruce Hoult]

This could be useful.

Should include the register numbers for x86 named registers.

The definition of "scratch registers" isn't consistent, as you included argument registers for some but not others (e.g. RISC-V)

The definition of "Intra-procedure-call scratch register" is not consistent, as it doesn't include e.g. RISC-V t0-t6.

I think you only need one of these categories, as I'm not aware of any ABI in which a called function is not allowed to destroy argument registers.

To me, "scratch register" means anything a function is allowed to destroy. There ar two kinds: registers which might hold an argument (and thus can not be touched by linkage code between the calling function and the called function), and registers which can't hold an argument ("Intra-procedure-call scratch register") and thus can be freely destroyed by code between the calling function and the called function, as well as by the called function.

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[Michael Clark]

Yes. It’s quite useful.

There is the question as to whether there needs to be RV32 and RV64 columns however the register assignments are common to both so it is not really necessary.

There is also RV32E to consider.

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[Benjamin Scherrey]

Quite useful. Might want to include bit sizes as well. 

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[Viller Hsiao]

Bruce Hoult於 2017年3月11日星期六 UTC+8上午2時54分30秒寫道：

This could be useful.

Should include the register numbers for x86 named registers.

This is done.

 

The definition of "scratch registers" isn't consistent, as you included argument registers for some but not others (e.g. RISC-V)

The definition of "Intra-procedure-call scratch register" is not consistent, as it doesn't include e.g. RISC-V t0-t6.

I think you only need one of these categories, as I'm not aware of any ABI in which a called function is not allowed to destroy argument registers.

To me, "scratch register" means anything a function is allowed to destroy. There ar two kinds: registers which might hold an argument (and thus can not be touched by linkage code between the calling function and the called function), and registers which can't hold an argument ("Intra-procedure-call scratch register") and thus can be freely destroyed by code between the calling function and the called function, as well as by the called function.

I think you are right, it is inconsistent in scratch registers fields. Arguments are removed from there to keep the original "scratch register" field smaller. "scratch registers" field is renamed as "other scratch registers (besides argument)" to make them clear.

Intra-procedure-call scratch registers are used by call veneers and PLT code in ARM/ARM64. Therefore I put them in an independent row. The row for architecture-specific purpose are marked as different color in the description column.

Thanks for your suggestion.

[Viller Hsiao]

Let me check that. Will update later.

michaeljclark於 2017年3月11日星期六 UTC+8上午7時27分07秒寫道：

Yes. It’s quite useful.

There is the question as to whether there needs to be RV32 and RV64 columns however the register assignments are common to both so it is not really necessary.

There is also RV32E to consider.

On 11 Mar 2017, at 7:54 AM, Bruce Hoult <br...@hoult.org> wrote:

This could be useful.

Should include the register numbers for x86 named registers.

The definition of "scratch registers" isn't consistent, as you included argument registers for some but not others (e.g. RISC-V)

The definition of "Intra-procedure-call scratch register" is not consistent, as it doesn't include e.g. RISC-V t0-t6.

I think you only need one of these categories, as I'm not aware of any ABI in which a called function is not allowed to destroy argument registers.

To me, "scratch register" means anything a function is allowed to destroy. There ar two kinds: registers which might hold an argument (and thus can not be touched by linkage code between the calling function and the called function), and registers which can't hold an argument ("Intra-procedure-call scratch register") and thus can be freely destroyed by code between the calling function and the called function, as well as by the called function.

On Fri, Mar 10, 2017 at 8:02 PM, Viller Hsiao <ville...@gmail.com> wrote:

Hi all,

To get familiar with CPU architectures, I made a cheat sheet about the register map of RISC-V/ARM/MIPS/x86. The URL is

https://docs.google.com/spreadsheets/d/1wiQdwfjoTHqToluk-sJItZLjdZNmGH5PcmMA0de9AMI/edit#gid=385523813

Hope it's helpful.

Regards,

Viller

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[Viller Hsiao]

Viller Hsiao於 2017年3月11日星期六 UTC+8下午5時42分20秒寫道：

Hi Bruce,

I can't find last comment so reply here.

I have reviewed scratch fields as well as preserved registers again and agree that scratch register for dynamic linking should not be architecture-specific. After thinking again, it might be easier to collect all scratch ones together. 

Viller