Hager Rafaat
unread,Jun 13, 2023, 9:00:08 PM6/13/23Sign in to reply to author
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to RISC-V SW Dev
hi, i am now adding push custom instruction to riscv32-gcc toolchain i will modify riscv-opc.c and riscv-opc.h and riscv.md for adding the functionalty of the push instruction and the functionality of the push is to saves the registers r1, [r5:r31] in the memory starting from location sp + 8 and with incrementing offset + 4 the rest of the register such that r5 will be saved in sp + 12 , r6 in sp + 16 , it does not take any operands or destination as every thisng is specified in the implementation of the hardware (processor ,memory) , so is these modifications are enough ? and when i modify the riscv-opc.c when i write the INSN_CLASS which one is suitable or do i need to define new one ?