RISC-V pseudo instructions in objdump

[Urs Thuermann]

objdump replaces instructions by pseudo instructions which in general
is desirable:

$ printf ".text\naddi a0,a1,0\nmv a0,a1\n" > foo.s
$ riscv64-linux-gnu-as -aln -ofoo.o foo.s
1 .text
2 0000 13850500 addi a0,a1,0
3 0004 13850500 mv a0,a1
$ riscv64-linux-gnu-objdump -dr foo.o

foo.o: file format elf64-littleriscv


Disassembly of section .text:

0000000000000000 <.text>:
0: 00058513 mv a0,a1
4: 00058513 mv a0,a1

But there are cases, e.g. when the immediate zero operand is yet to be
relocated, when the pseudo instruction can be confusing:

$ printf "char c; char *foo() { return &c; }\n" > foo.c
$ riscv64-linux-gnu-gcc -fno-pic -Os -c foo.c
$ riscv64-linux-gnu-objdump -dr foo.o

foo.o: file format elf64-littleriscv


Disassembly of section .text:

0000000000000000 <foo>:
0: 00000537 lui a0,0x0
0: R_RISCV_HI20 c
0: R_RISCV_RELAX *ABS*
4: 00050513 mv a0,a0
4: R_RISCV_LO12_I c
4: R_RISCV_RELAX *ABS*
8: 8082 ret

Here, the mv a0,a0 is actually addi a0,a0,0 where the zero operand
will be replaced. I think it would be more readable to keep the addi
instruction here.

So I suggest not to replace those instructions which are affected by
an entry in any relocation table.

Also, I'd like a command-line option to prevent translation to pseudo
instructions completely, and may a second option to prevent
translation of register names also.

urs

[Nelson Chu]

Hi Urs,

Try the objdump option -Mno-aliases, and also can use -Mstandard if you want to show the standard register names. 

Nelson

--
You received this message because you are subscribed to the Google Groups "RISC-V SW Dev" group.
To unsubscribe from this group and stop receiving emails from it, send an email to sw-dev+un...@groups.riscv.org.
To view this discussion on the web visit https://groups.google.com/a/groups.riscv.org/d/msgid/sw-dev/ygf7dklffp3.fsf%40tehran.isnogud.escape.de.

[Daniel Petrisko]

Also, I'd like a command-line option to prevent translation to pseudo
instructions completely, and may a second option to prevent
translation of register names also.

https://stackoverflow.com/questions/31455996/riscv-dissassembly-options-numeric-and-no-aliases

Numeric and no-aliases are what you’re looking for for the latter two ideas. 

Best,

Dan Petrisko

On Apr 29, 2021, at 8:20 AM, Urs Thuermann <u...@isnogud.escape.de> wrote:

objdump replaces instructions by pseudo instructions which in general

[Urs Thuermann]

Daniel Petrisko <petr...@cs.washington.edu> writes:

> https://stackoverflow.com/questions/31455996/riscv-dissassembly-options-numeric-and-no-aliases
>
> Numeric and no-aliases are what you're looking for for the latter
> two ideas.

Ah, thanks. It's not in the man page and new to me.

I would still suggest to apply the effect of -Mno-aliases
automatically to instructions that are mapped differently to pseudo
instructions after relocation. That is, do translate to 'call' even
if it's affected by relocation, but don't translate 'addi a0,a0,0' to
'mv a0,a0', if the immediate 0 can be changed by relocation.

urs

[Tommy Murphy]

Those options *are* covered here as far as I can see...

https://sourceware.org/binutils/docs/binutils/objdump.html

---

From: u...@isnogud.escape.de <u...@isnogud.escape.de> on behalf of Urs Thuermann <u...@isnogud.escape.de>
Sent: Thursday, April 29, 2021 2:22:24 PM
To: RISC-V SW Dev <sw-...@groups.riscv.org>
Subject: Re: [sw-dev] RISC-V pseudo instructions in objdump

 

--
You received this message because you are subscribed to the Google Groups "RISC-V SW Dev" group.
To unsubscribe from this group and stop receiving emails from it, send an email to sw-dev+un...@groups.riscv.org.

To view this discussion on the web visit https://groups.google.com/a/groups.riscv.org/d/msgid/sw-dev/ygfk0ol8bu7.fsf%40tehran.isnogud.escape.de.

[Urs Thuermann]

Tommy Murphy <tommy_...@hotmail.com> writes:

> Those options *are* covered here as far as I can see...
>
> https://sourceware.org/binutils/docs/binutils/objdump.html

There's no section on RISC-V at all. OK, I could have looked more
carefully to see the -Mno-aliases option for Aarch64 and MIPS and just
try it on RISC-V binaries. A -Mnumeric option isn't documented, only
-Mreg-names=numeric, -Mgpr-names=numeric etc. for MIPS but which don't
work for RISC-V objdump.

urs

[Jim Wilson]

Yes, docs for RISC-V disassembler options are missing.  Please file a FSF Binutils bug report to get this fixed.

Jim

[Nelson Chu]

On Sat, May 1, 2021 at 12:52 AM Jim Wilson <ji...@sifive.com> wrote:
> Yes, docs for RISC-V disassembler options are missing. Please file a FSF Binutils bug report to get this fixed.

I file a one as follows,
https://sourceware.org/bugzilla/show_bug.cgi?id=27809

Thanks
Nelson

[Urs Thuermann]

Jim Wilson <ji...@sifive.com> writes:

> Yes, docs for RISC-V disassembler options are missing. Please file a FSF
> Binutils bug report to get this fixed.

I see Nelson Chu has already done it. I've sent a patch to binu...@sourceware.org.

urs