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strongly-typed RVV intrinsic

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Saltuk Akgül

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Jan 31, 2025, 5:55:54 PMJan 31
to RISC-V SW Dev
Hi,
I am reading documentation for RVV intrinsic here:
https://github.com/riscv-non-isa/rvv-intrinsic-doc/blob/main/doc/rvv-intrinsic-spec.adoc

I have seen that "The RISC-V vector intrinsics' data types are strongly-typed" but I couldn't find anywhere an explanation why this is the case? Why we need to pick LMUL and compiler can't choose for us. Can somebody direct me to an article or a forum thread that explains why strongly typed approach is selected.

Thanks in advance.
Saltuk
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